CVE-2021-3600 aka bpf: Fix 32 bit src register truncation on div/mod

Pavel Machek
2021-08-26T10:23:40Z

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Hi!

As far as I can tell, CVE-2021-3600 is still a problem for 4.14 and
4.19.

Unfortunately, those kernels lack BPF_JMP32 support, and that support
is too big and intrusive to backport.

So I tried to come up with solution without JMP32 support... only to
end up with not seeing the bug in the affected code.

Changelog says:

bpf: Fix 32 bit src register truncation on div/mod

While reviewing a different fix, John and I noticed an oddity in one of the
BPF program dumps that stood out, for example:

# bpftool p d x i 13
0: (b7) r0 = 808464450
1: (b4) w4 = 808464432
2: (bc) w0 = w0
3: (15) if r0 == 0x0 goto pc+1
4: (9c) w4 %= w0
[...]

In line 2 we noticed that the mov32 would 32 bit truncate the original src
register for the div/mod operation. While for the two operations the dst
register is typically marked unknown e.g. from adjust_scalar_min_max_vals()
the src register is not, and thus verifier keeps tracking original bounds,
simplified:

So this explains "mov32 w0, w0" is problematic, and fixes the bug by
replacing it with jmp32. Unfortunately, I can't do that in 4.19; plus
I don't really see how the bug is solved -- we avoided adding mov32
sequence that triggers the problem, but the problematic sequence could
still be produced by the userspace, no?

Does adjust_scalar_min_max_vals still need fixing?

Do you have any hints how to solve this in 4.19?

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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