From: "Marek Behún" <kabel@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Sasha Levin <sashal@kernel.org>
Cc: pali@kernel.org, stable@vger.kernel.org,
"Frederick Lawler" <fred@fredlawl.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Marek Behún" <kabel@kernel.org>
Subject: [PATCH 4.14 17/24] PCI: Add PCI_EXP_LNKCTL2_TLS* macros
Date: Wed, 24 Nov 2021 23:49:26 +0100 [thread overview]
Message-ID: <20211124224933.24275-18-kabel@kernel.org> (raw)
In-Reply-To: <20211124224933.24275-1-kabel@kernel.org>
From: Frederick Lawler <fred@fredlawl.com>
commit c80851f6ce63a6e313f8c7b4b6eb82c67aa4497b upstream.
The Link Control 2 register is missing macros for Target Link Speeds. Add
those in.
Signed-off-by: Frederick Lawler <fred@fredlawl.com>
[bhelgaas: use "GT" instead of "GB"]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
include/uapi/linux/pci_regs.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index c843929e0c4f..5db024aa00e9 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -654,6 +654,11 @@
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8.0GT/s */
#define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100 /* Crosslink supported */
#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
+#define PCI_EXP_LNKCTL2_TLS 0x000f
+#define PCI_EXP_LNKCTL2_TLS_2_5GT 0x0001 /* Supported Speed 2.5GT/s */
+#define PCI_EXP_LNKCTL2_TLS_5_0GT 0x0002 /* Supported Speed 5GT/s */
+#define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Supported Speed 8GT/s */
+#define PCI_EXP_LNKCTL2_TLS_16_0GT 0x0004 /* Supported Speed 16GT/s */
#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52 /* v2 endpoints with link end here */
#define PCI_EXP_SLTCAP2 52 /* Slot Capabilities 2 */
--
2.32.0
next prev parent reply other threads:[~2021-11-24 22:50 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-24 22:49 [PATCH 4.14 00/24] Armada 3720 PCIe fixes for 4.14 Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 01/24] PCI: aardvark: Fix I/O space page leak Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 02/24] PCI: aardvark: Fix a leaked reference by adding missing of_node_put() Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 03/24] PCI: aardvark: Wait for endpoint to be ready before training link Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 04/24] PCI: aardvark: Train link immediately after enabling training Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 05/24] PCI: aardvark: Improve link training Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 06/24] PCI: aardvark: Issue PERST via GPIO Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 07/24] PCI: aardvark: Replace custom macros by standard linux/pci_regs.h macros Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 08/24] PCI: aardvark: Indicate error in 'val' when config read fails Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 09/24] PCI: aardvark: Introduce an advk_pcie_valid_device() helper Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 10/24] PCI: aardvark: Don't touch PCIe registers if no card connected Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 11/24] PCI: aardvark: Fix compilation on s390 Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 12/24] PCI: aardvark: Move PCIe reset card code to advk_pcie_train_link() Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 13/24] PCI: aardvark: Update comment about disabling link training Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 14/24] PCI: aardvark: Remove PCIe outbound window configuration Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 15/24] PCI: aardvark: Configure PCIe resources from 'ranges' DT property Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 16/24] PCI: aardvark: Fix PCIe Max Payload Size setting Marek Behún
2021-11-24 22:49 ` Marek Behún [this message]
2021-11-24 22:49 ` [PATCH 4.14 18/24] PCI: aardvark: Fix link training Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 19/24] PCI: aardvark: Fix checking for link up via LTSSM state Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 20/24] pinctrl: armada-37xx: Correct mpp definitions Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 21/24] pinctrl: armada-37xx: add missing pin: PCIe1 Wakeup Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 22/24] pinctrl: armada-37xx: Correct PWM pins definitions Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 23/24] arm64: dts: marvell: armada-37xx: declare PCIe reset pin Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 24/24] arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function Marek Behún
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