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From: "Marek Behún" <kabel@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Sasha Levin <sashal@kernel.org>
Cc: pali@kernel.org, stable@vger.kernel.org,
	"Gregory CLEMENT" <gregory.clement@bootlin.com>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Marek Behún" <kabel@kernel.org>
Subject: [PATCH 4.14 21/24] pinctrl: armada-37xx: add missing pin: PCIe1 Wakeup
Date: Wed, 24 Nov 2021 23:49:30 +0100	[thread overview]
Message-ID: <20211124224933.24275-22-kabel@kernel.org> (raw)
In-Reply-To: <20211124224933.24275-1-kabel@kernel.org>

From: Gregory CLEMENT <gregory.clement@bootlin.com>

commit 4d98fbaacd79a82f408febb66a9c42fe42361b16 upstream.

Declare the PCIe1 Wakeup which was initially missing.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 4b4fd4661268..a58367909455 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -185,6 +185,7 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
 	PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"),
 	PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
+	PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
 	PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
 	PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
 	PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
-- 
2.32.0


  parent reply	other threads:[~2021-11-24 22:50 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-24 22:49 [PATCH 4.14 00/24] Armada 3720 PCIe fixes for 4.14 Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 01/24] PCI: aardvark: Fix I/O space page leak Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 02/24] PCI: aardvark: Fix a leaked reference by adding missing of_node_put() Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 03/24] PCI: aardvark: Wait for endpoint to be ready before training link Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 04/24] PCI: aardvark: Train link immediately after enabling training Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 05/24] PCI: aardvark: Improve link training Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 06/24] PCI: aardvark: Issue PERST via GPIO Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 07/24] PCI: aardvark: Replace custom macros by standard linux/pci_regs.h macros Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 08/24] PCI: aardvark: Indicate error in 'val' when config read fails Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 09/24] PCI: aardvark: Introduce an advk_pcie_valid_device() helper Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 10/24] PCI: aardvark: Don't touch PCIe registers if no card connected Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 11/24] PCI: aardvark: Fix compilation on s390 Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 12/24] PCI: aardvark: Move PCIe reset card code to advk_pcie_train_link() Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 13/24] PCI: aardvark: Update comment about disabling link training Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 14/24] PCI: aardvark: Remove PCIe outbound window configuration Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 15/24] PCI: aardvark: Configure PCIe resources from 'ranges' DT property Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 16/24] PCI: aardvark: Fix PCIe Max Payload Size setting Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 17/24] PCI: Add PCI_EXP_LNKCTL2_TLS* macros Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 18/24] PCI: aardvark: Fix link training Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 19/24] PCI: aardvark: Fix checking for link up via LTSSM state Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 20/24] pinctrl: armada-37xx: Correct mpp definitions Marek Behún
2021-11-24 22:49 ` Marek Behún [this message]
2021-11-24 22:49 ` [PATCH 4.14 22/24] pinctrl: armada-37xx: Correct PWM pins definitions Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 23/24] arm64: dts: marvell: armada-37xx: declare PCIe reset pin Marek Behún
2021-11-24 22:49 ` [PATCH 4.14 24/24] arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function Marek Behún

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