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From: "Marek Behún" <kabel@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Sasha Levin <sashal@kernel.org>
Cc: pali@kernel.org, stable@vger.kernel.org,
	"Marek Behún" <kabel@kernel.org>, "Rob Herring" <robh@kernel.org>,
	"Linus Walleij" <linus.walleij@linaro.org>
Subject: [PATCH 4.19 18/20] pinctrl: armada-37xx: Correct PWM pins definitions
Date: Thu, 25 Nov 2021 00:04:58 +0100	[thread overview]
Message-ID: <20211124230500.27109-19-kabel@kernel.org> (raw)
In-Reply-To: <20211124230500.27109-1-kabel@kernel.org>

commit baf8d6899b1e8906dc076ef26cc633e96a8bb0c3 upstream.

The PWM pins on North Bridge on Armada 37xx can be configured into PWM
or GPIO functions. When in PWM function, each pin can also be configured
to drive low on 0 and tri-state on 1 (LED mode).

The current definitions handle this by declaring two pin groups for each
pin:
- group "pwmN" with functions "pwm" and "gpio"
- group "ledN_od" ("od" for open drain) with functions "led" and "gpio"

This is semantically incorrect. The correct definition for each pin
should be one group with three functions: "pwm", "led" and "gpio".

Change the "pwmN" groups to support "led" function.

Remove "ledN_od" groups. This cannot break backwards compatibility with
older device trees: no device tree uses it since there is no PWM driver
for this SOC yet. Also "ledN_od" groups are not even documented.

Fixes: b835d6953009 ("pinctrl: armada-37xx: swap polarity on LED group")
Signed-off-by: Marek Behún <kabel@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210719112938.27594-1-kabel@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
 .../pinctrl/marvell,armada-37xx-pinctrl.txt     |  8 ++++----
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c     | 17 ++++++++---------
 2 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
index f69f82741cae..fb8ec9b0f8c7 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
@@ -43,19 +43,19 @@ group emmc_nb
 
 group pwm0
  - pin 11 (GPIO1-11)
- - functions pwm, gpio
+ - functions pwm, led, gpio
 
 group pwm1
  - pin 12
- - functions pwm, gpio
+ - functions pwm, led, gpio
 
 group pwm2
  - pin 13
- - functions pwm, gpio
+ - functions pwm, led, gpio
 
 group pwm3
  - pin 14
- - functions pwm, gpio
+ - functions pwm, led, gpio
 
 group pmic1
  - pin 7
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index adfb1d0d58dd..e69b84d9538a 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -166,10 +166,14 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 	PIN_GRP_GPIO("jtag", 20, 5, BIT(0), "jtag"),
 	PIN_GRP_GPIO("sdio0", 8, 3, BIT(1), "sdio"),
 	PIN_GRP_GPIO("emmc_nb", 27, 9, BIT(2), "emmc"),
-	PIN_GRP_GPIO("pwm0", 11, 1, BIT(3), "pwm"),
-	PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
-	PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
-	PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
+	PIN_GRP_GPIO_3("pwm0", 11, 1, BIT(3) | BIT(20), 0, BIT(20), BIT(3),
+		       "pwm", "led"),
+	PIN_GRP_GPIO_3("pwm1", 12, 1, BIT(4) | BIT(21), 0, BIT(21), BIT(4),
+		       "pwm", "led"),
+	PIN_GRP_GPIO_3("pwm2", 13, 1, BIT(5) | BIT(22), 0, BIT(22), BIT(5),
+		       "pwm", "led"),
+	PIN_GRP_GPIO_3("pwm3", 14, 1, BIT(6) | BIT(23), 0, BIT(23), BIT(6),
+		       "pwm", "led"),
 	PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
 	PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
 	PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
@@ -183,11 +187,6 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 	PIN_GRP_EXTRA("uart2", 9, 2, BIT(1) | BIT(13) | BIT(14) | BIT(19),
 		      BIT(1) | BIT(13) | BIT(14), BIT(1) | BIT(19),
 		      18, 2, "gpio", "uart"),
-	PIN_GRP_GPIO_2("led0_od", 11, 1, BIT(20), BIT(20), 0, "led"),
-	PIN_GRP_GPIO_2("led1_od", 12, 1, BIT(21), BIT(21), 0, "led"),
-	PIN_GRP_GPIO_2("led2_od", 13, 1, BIT(22), BIT(22), 0, "led"),
-	PIN_GRP_GPIO_2("led3_od", 14, 1, BIT(23), BIT(23), 0, "led"),
-
 };
 
 static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
-- 
2.32.0


  parent reply	other threads:[~2021-11-24 23:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-24 23:04 [PATCH 4.19 00/20] Armada 3720 PCIe fixes for 4.19 Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 01/20] PCI: aardvark: Fix a leaked reference by adding missing of_node_put() Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 02/20] PCI: aardvark: Wait for endpoint to be ready before training link Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 03/20] PCI: aardvark: Train link immediately after enabling training Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 04/20] PCI: aardvark: Improve link training Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 05/20] PCI: aardvark: Issue PERST via GPIO Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 06/20] PCI: aardvark: Replace custom macros by standard linux/pci_regs.h macros Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 07/20] PCI: aardvark: Indicate error in 'val' when config read fails Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 08/20] PCI: aardvark: Don't touch PCIe registers if no card connected Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 09/20] PCI: aardvark: Fix compilation on s390 Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 10/20] PCI: aardvark: Move PCIe reset card code to advk_pcie_train_link() Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 11/20] PCI: aardvark: Update comment about disabling link training Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 12/20] PCI: aardvark: Configure PCIe resources from 'ranges' DT property Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 13/20] PCI: aardvark: Fix PCIe Max Payload Size setting Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 14/20] PCI: aardvark: Fix link training Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 15/20] PCI: aardvark: Fix checking for link up via LTSSM state Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 16/20] pinctrl: armada-37xx: Correct mpp definitions Marek Behún
2021-11-24 23:04 ` [PATCH 4.19 17/20] pinctrl: armada-37xx: add missing pin: PCIe1 Wakeup Marek Behún
2021-11-24 23:04 ` Marek Behún [this message]
2021-11-24 23:04 ` [PATCH 4.19 19/20] arm64: dts: marvell: armada-37xx: declare PCIe reset pin Marek Behún
2021-11-24 23:05 ` [PATCH 4.19 20/20] arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function Marek Behún
2021-11-28 14:16 ` [PATCH 4.19 00/20] Armada 3720 PCIe fixes for 4.19 Greg Kroah-Hartman
2021-11-28 14:16 ` Greg Kroah-Hartman
2021-11-28 14:22   ` Pali Rohár
2021-11-28 14:36     ` Greg Kroah-Hartman
2021-11-28 16:33       ` Pali Rohár

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