From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9595C433F5 for ; Mon, 17 Jan 2022 17:11:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238008AbiAQRLN (ORCPT ); Mon, 17 Jan 2022 12:11:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242160AbiAQRGm (ORCPT ); Mon, 17 Jan 2022 12:06:42 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3AD75C0612AF; Mon, 17 Jan 2022 09:04:11 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CAF7061258; Mon, 17 Jan 2022 17:04:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 18047C36AED; Mon, 17 Jan 2022 17:04:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1642439050; bh=rB6Zg+CMwhJliJX6NAPO6qIY5v6Ys7TXXUv50Yzxacg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XW6fNDbb8631a2IF1/NlhUDHtjojHKCLFWvwnOXJlYiirmIRYghcxitVuw8Qh68Un ULDrtHYC9grc4JqcZPJVeqH2cC9R1OcdUM40LrRSMfHCHGsPeriqNjy/7RCZgPfGeW C+amosdE4Jjoo/TEequ8LPA2qpMGaVnxIPEOSGyLcKUHH9bf+DpQg2oUUwcPMF8GNl y9xVDHbpw5XL2KaiS4cL9ACOfbJBnOB8Xn0M/9cqxmTe3jQ0Kp4yo7IxYmYfxvQazy lidxKEgA2veUA5JMgXuUlLPT5R9TefuCpJjEU2EF4H1GaRjVoJqeTBvOWznzgyxJd+ 0+DjAHfE6k0Tw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Nathan Chancellor , Ryutaroh Matsumoto , Thomas Bogendoerfer , Sasha Levin , chenhuacai@kernel.org, jiaxun.yang@flygoat.com, ndesaulniers@google.com, linux-mips@vger.kernel.org, llvm@lists.linux.dev Subject: [PATCH AUTOSEL 5.10 20/34] MIPS: Loongson64: Use three arguments for slti Date: Mon, 17 Jan 2022 12:03:10 -0500 Message-Id: <20220117170326.1471712-20-sashal@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220117170326.1471712-1-sashal@kernel.org> References: <20220117170326.1471712-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Nathan Chancellor [ Upstream commit f2c6c22fa83ab2577619009057b3ebcb5305bb03 ] LLVM's integrated assembler does not support 'slti , ': :16:12: error: invalid operand for instruction slti $12, (0x6300 | 0x0008) ^ arch/mips/kernel/head.S:86:2: note: while in macro instantiation kernel_entry_setup # cpu specific setup ^ :16:12: error: invalid operand for instruction slti $12, (0x6300 | 0x0008) ^ arch/mips/kernel/head.S:150:2: note: while in macro instantiation smp_slave_setup ^ To increase compatibility with LLVM's integrated assembler, use the full form of 'slti , , ', which matches the rest of arch/mips/. This does not result in any change for GNU as. Link: https://github.com/ClangBuiltLinux/linux/issues/1526 Reported-by: Ryutaroh Matsumoto Signed-off-by: Nathan Chancellor Signed-off-by: Thomas Bogendoerfer Signed-off-by: Sasha Levin --- arch/mips/include/asm/mach-loongson64/kernel-entry-init.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h index 87a5bfbf8cfe9..28572ddfb004a 100644 --- a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h +++ b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h @@ -36,7 +36,7 @@ nop /* Loongson-3A R2/R3 */ andi t0, (PRID_IMP_MASK | PRID_REV_MASK) - slti t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) + slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) bnez t0, 2f nop 1: @@ -71,7 +71,7 @@ nop /* Loongson-3A R2/R3 */ andi t0, (PRID_IMP_MASK | PRID_REV_MASK) - slti t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) + slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) bnez t0, 2f nop 1: -- 2.34.1