* [PATCH v3 0/1] clk: jz4725b: fix mmc0 clock gating [not found] <4FSS6R.0A48V2ZMZD7X1@crapouillou.net> @ 2022-02-05 9:45 ` Siarhei Volkau 2022-02-05 9:45 ` [PATCH v3 1/1] " Siarhei Volkau 0 siblings, 1 reply; 8+ messages in thread From: Siarhei Volkau @ 2022-02-05 9:45 UTC (permalink / raw) To: Paul Cercueil Cc: Michael Turquette, Stephen Boyd, linux-mips, linux-clk, stable, Siarhei Volkau The mmc0 clock gate bit was mistakenly assigned to "i2s" clock. You can find that the same bit is assigned to "mmc0" too. It leads to mmc0 hang for a long time after any sound activity also it prevented PM_SLEEP to work properly. I guess it was introduced by copy-paste from jz4740 driver where it is really controls I2S clock gate. Changelog v2 .. v3: - Added tags Fixes and Reviewed-by. Changelog v1 .. v2: - Added useful info above to the commit itself. Siarhei Volkau (1): clk: jz4725b: fix mmc0 clock gating drivers/clk/ingenic/jz4725b-cgu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.35.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 1/1] clk: jz4725b: fix mmc0 clock gating 2022-02-05 9:45 ` [PATCH v3 0/1] clk: jz4725b: fix mmc0 clock gating Siarhei Volkau @ 2022-02-05 9:45 ` Siarhei Volkau 2022-02-05 9:59 ` Greg KH 0 siblings, 1 reply; 8+ messages in thread From: Siarhei Volkau @ 2022-02-05 9:45 UTC (permalink / raw) To: Paul Cercueil Cc: Michael Turquette, Stephen Boyd, linux-mips, linux-clk, stable, Siarhei Volkau The mmc0 clock gate bit was mistakenly assigned to "i2s" clock. You can find that the same bit is assigned to "mmc0" too. It leads to mmc0 hang for a long time after any sound activity also it prevented PM_SLEEP to work properly. I guess it was introduced by copy-paste from jz4740 driver where it is really controls I2S clock gate. Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver") Signed-off-by: Siarhei Volkau <lis8215@gmail.com> Tested-by: Siarhei Volkau <lis8215@gmail.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> --- drivers/clk/ingenic/jz4725b-cgu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/clk/ingenic/jz4725b-cgu.c b/drivers/clk/ingenic/jz4725b-cgu.c index 744d136..15d6179 100644 --- a/drivers/clk/ingenic/jz4725b-cgu.c +++ b/drivers/clk/ingenic/jz4725b-cgu.c @@ -139,11 +139,10 @@ static const struct ingenic_cgu_clk_info jz4725b_cgu_clocks[] = { }, [JZ4725B_CLK_I2S] = { - "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, + "i2s", CGU_CLK_MUX | CGU_CLK_DIV, .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL_HALF, -1, -1 }, .mux = { CGU_REG_CPCCR, 31, 1 }, .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1 }, - .gate = { CGU_REG_CLKGR, 6 }, }, [JZ4725B_CLK_SPI] = { -- 2.35.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v3 1/1] clk: jz4725b: fix mmc0 clock gating 2022-02-05 9:45 ` [PATCH v3 1/1] " Siarhei Volkau @ 2022-02-05 9:59 ` Greg KH 2022-02-05 12:15 ` Paul Cercueil 0 siblings, 1 reply; 8+ messages in thread From: Greg KH @ 2022-02-05 9:59 UTC (permalink / raw) To: Siarhei Volkau Cc: Paul Cercueil, Michael Turquette, Stephen Boyd, linux-mips, linux-clk, stable On Sat, Feb 05, 2022 at 12:45:31PM +0300, Siarhei Volkau wrote: > The mmc0 clock gate bit was mistakenly assigned to "i2s" clock. > You can find that the same bit is assigned to "mmc0" too. > It leads to mmc0 hang for a long time after any sound activity > also it prevented PM_SLEEP to work properly. > I guess it was introduced by copy-paste from jz4740 driver > where it is really controls I2S clock gate. > > Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver") > Signed-off-by: Siarhei Volkau <lis8215@gmail.com> > Tested-by: Siarhei Volkau <lis8215@gmail.com> > Reviewed-by: Paul Cercueil <paul@crapouillou.net> > --- > drivers/clk/ingenic/jz4725b-cgu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/clk/ingenic/jz4725b-cgu.c b/drivers/clk/ingenic/jz4725b-cgu.c > index 744d136..15d6179 100644 > --- a/drivers/clk/ingenic/jz4725b-cgu.c > +++ b/drivers/clk/ingenic/jz4725b-cgu.c > @@ -139,11 +139,10 @@ static const struct ingenic_cgu_clk_info jz4725b_cgu_clocks[] = { > }, > > [JZ4725B_CLK_I2S] = { > - "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, > + "i2s", CGU_CLK_MUX | CGU_CLK_DIV, > .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL_HALF, -1, -1 }, > .mux = { CGU_REG_CPCCR, 31, 1 }, > .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1 }, > - .gate = { CGU_REG_CLKGR, 6 }, > }, > > [JZ4725B_CLK_SPI] = { > -- > 2.35.1 > <formletter> This is not the correct way to submit patches for inclusion in the stable kernel tree. Please read: https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html for how to do this properly. </formletter> ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 1/1] clk: jz4725b: fix mmc0 clock gating 2022-02-05 9:59 ` Greg KH @ 2022-02-05 12:15 ` Paul Cercueil 2022-02-05 12:48 ` Greg KH 0 siblings, 1 reply; 8+ messages in thread From: Paul Cercueil @ 2022-02-05 12:15 UTC (permalink / raw) To: Greg KH Cc: Siarhei Volkau, Michael Turquette, Stephen Boyd, linux-mips, linux-clk, stable Hi Greg, Le sam., févr. 5 2022 at 10:59:50 +0100, Greg KH <gregkh@linuxfoundation.org> a écrit : > On Sat, Feb 05, 2022 at 12:45:31PM +0300, Siarhei Volkau wrote: >> The mmc0 clock gate bit was mistakenly assigned to "i2s" clock. >> You can find that the same bit is assigned to "mmc0" too. >> It leads to mmc0 hang for a long time after any sound activity >> also it prevented PM_SLEEP to work properly. >> I guess it was introduced by copy-paste from jz4740 driver >> where it is really controls I2S clock gate. >> >> Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver") >> Signed-off-by: Siarhei Volkau <lis8215@gmail.com> >> Tested-by: Siarhei Volkau <lis8215@gmail.com> >> Reviewed-by: Paul Cercueil <paul@crapouillou.net> >> --- >> drivers/clk/ingenic/jz4725b-cgu.c | 3 +-- >> 1 file changed, 1 insertion(+), 2 deletions(-) >> >> diff --git a/drivers/clk/ingenic/jz4725b-cgu.c >> b/drivers/clk/ingenic/jz4725b-cgu.c >> index 744d136..15d6179 100644 >> --- a/drivers/clk/ingenic/jz4725b-cgu.c >> +++ b/drivers/clk/ingenic/jz4725b-cgu.c >> @@ -139,11 +139,10 @@ static const struct ingenic_cgu_clk_info >> jz4725b_cgu_clocks[] = { >> }, >> >> [JZ4725B_CLK_I2S] = { >> - "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, >> + "i2s", CGU_CLK_MUX | CGU_CLK_DIV, >> .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL_HALF, -1, -1 }, >> .mux = { CGU_REG_CPCCR, 31, 1 }, >> .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1 }, >> - .gate = { CGU_REG_CLKGR, 6 }, >> }, >> >> [JZ4725B_CLK_SPI] = { >> -- >> 2.35.1 >> > > <formletter> > > This is not the correct way to submit patches for inclusion in the > stable kernel tree. Please read: > > https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html > for how to do this properly. > > </formletter> What's wrong with this patch exactly? It looks good to me. Cheers, -Paul ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 1/1] clk: jz4725b: fix mmc0 clock gating 2022-02-05 12:15 ` Paul Cercueil @ 2022-02-05 12:48 ` Greg KH 2022-02-05 17:18 ` [PATCH v4 0/1] " Siarhei Volkau 0 siblings, 1 reply; 8+ messages in thread From: Greg KH @ 2022-02-05 12:48 UTC (permalink / raw) To: Paul Cercueil Cc: Siarhei Volkau, Michael Turquette, Stephen Boyd, linux-mips, linux-clk, stable On Sat, Feb 05, 2022 at 12:15:15PM +0000, Paul Cercueil wrote: > Hi Greg, > > Le sam., févr. 5 2022 at 10:59:50 +0100, Greg KH > <gregkh@linuxfoundation.org> a écrit : > > On Sat, Feb 05, 2022 at 12:45:31PM +0300, Siarhei Volkau wrote: > > > The mmc0 clock gate bit was mistakenly assigned to "i2s" clock. > > > You can find that the same bit is assigned to "mmc0" too. > > > It leads to mmc0 hang for a long time after any sound activity > > > also it prevented PM_SLEEP to work properly. > > > I guess it was introduced by copy-paste from jz4740 driver > > > where it is really controls I2S clock gate. > > > > > > Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver") > > > Signed-off-by: Siarhei Volkau <lis8215@gmail.com> > > > Tested-by: Siarhei Volkau <lis8215@gmail.com> > > > Reviewed-by: Paul Cercueil <paul@crapouillou.net> > > > --- > > > drivers/clk/ingenic/jz4725b-cgu.c | 3 +-- > > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > > > diff --git a/drivers/clk/ingenic/jz4725b-cgu.c > > > b/drivers/clk/ingenic/jz4725b-cgu.c > > > index 744d136..15d6179 100644 > > > --- a/drivers/clk/ingenic/jz4725b-cgu.c > > > +++ b/drivers/clk/ingenic/jz4725b-cgu.c > > > @@ -139,11 +139,10 @@ static const struct ingenic_cgu_clk_info > > > jz4725b_cgu_clocks[] = { > > > }, > > > > > > [JZ4725B_CLK_I2S] = { > > > - "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, > > > + "i2s", CGU_CLK_MUX | CGU_CLK_DIV, > > > .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL_HALF, -1, -1 }, > > > .mux = { CGU_REG_CPCCR, 31, 1 }, > > > .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1 }, > > > - .gate = { CGU_REG_CLKGR, 6 }, > > > }, > > > > > > [JZ4725B_CLK_SPI] = { > > > -- > > > 2.35.1 > > > > > > > <formletter> > > > > This is not the correct way to submit patches for inclusion in the > > stable kernel tree. Please read: > > https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html > > for how to do this properly. > > > > </formletter> > > What's wrong with this patch exactly? It looks good to me. No "Cc: stable@..." in the signed-off-by area. ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v4 0/1] clk: jz4725b: fix mmc0 clock gating 2022-02-05 12:48 ` Greg KH @ 2022-02-05 17:18 ` Siarhei Volkau 2022-02-05 17:18 ` [PATCH v4 1/1] " Siarhei Volkau 0 siblings, 1 reply; 8+ messages in thread From: Siarhei Volkau @ 2022-02-05 17:18 UTC (permalink / raw) To: Paul Cercueil Cc: Michael Turquette, Stephen Boyd, linux-mips, linux-clk, stable, Greg KH, Siarhei Volkau The mmc0 clock gate bit was mistakenly assigned to "i2s" clock. You can find that the same bit is assigned to "mmc0" too. It leads to mmc0 hang for a long time after any sound activity also it prevented PM_SLEEP to work properly. I guess it was introduced by copy-paste from jz4740 driver where it is really controls I2S clock gate. Changelog v3 .. v4: - Added tag "Cc: stable@..." Changelog v2 .. v3: - Added tags Fixes and Reviewed-by. Changelog v1 .. v2: - Added useful info above to the commit itself. Siarhei Volkau (1): clk: jz4725b: fix mmc0 clock gating drivers/clk/ingenic/jz4725b-cgu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.35.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v4 1/1] clk: jz4725b: fix mmc0 clock gating 2022-02-05 17:18 ` [PATCH v4 0/1] " Siarhei Volkau @ 2022-02-05 17:18 ` Siarhei Volkau 2022-02-18 1:04 ` Stephen Boyd 0 siblings, 1 reply; 8+ messages in thread From: Siarhei Volkau @ 2022-02-05 17:18 UTC (permalink / raw) To: Paul Cercueil Cc: Michael Turquette, Stephen Boyd, linux-mips, linux-clk, stable, Greg KH, Siarhei Volkau The mmc0 clock gate bit was mistakenly assigned to "i2s" clock. You can find that the same bit is assigned to "mmc0" too. It leads to mmc0 hang for a long time after any sound activity also it prevented PM_SLEEP to work properly. I guess it was introduced by copy-paste from jz4740 driver where it is really controls I2S clock gate. Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver") Signed-off-by: Siarhei Volkau <lis8215@gmail.com> Tested-by: Siarhei Volkau <lis8215@gmail.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Cc: stable@vger.kernel.org --- drivers/clk/ingenic/jz4725b-cgu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/clk/ingenic/jz4725b-cgu.c b/drivers/clk/ingenic/jz4725b-cgu.c index 744d136..15d6179 100644 --- a/drivers/clk/ingenic/jz4725b-cgu.c +++ b/drivers/clk/ingenic/jz4725b-cgu.c @@ -139,11 +139,10 @@ static const struct ingenic_cgu_clk_info jz4725b_cgu_clocks[] = { }, [JZ4725B_CLK_I2S] = { - "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, + "i2s", CGU_CLK_MUX | CGU_CLK_DIV, .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL_HALF, -1, -1 }, .mux = { CGU_REG_CPCCR, 31, 1 }, .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1 }, - .gate = { CGU_REG_CLKGR, 6 }, }, [JZ4725B_CLK_SPI] = { -- 2.35.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v4 1/1] clk: jz4725b: fix mmc0 clock gating 2022-02-05 17:18 ` [PATCH v4 1/1] " Siarhei Volkau @ 2022-02-18 1:04 ` Stephen Boyd 0 siblings, 0 replies; 8+ messages in thread From: Stephen Boyd @ 2022-02-18 1:04 UTC (permalink / raw) To: Paul Cercueil, Siarhei Volkau Cc: Michael Turquette, linux-mips, linux-clk, stable, Greg KH, Siarhei Volkau Quoting Siarhei Volkau (2022-02-05 09:18:49) > The mmc0 clock gate bit was mistakenly assigned to "i2s" clock. > You can find that the same bit is assigned to "mmc0" too. > It leads to mmc0 hang for a long time after any sound activity > also it prevented PM_SLEEP to work properly. > I guess it was introduced by copy-paste from jz4740 driver > where it is really controls I2S clock gate. > > Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver") > Signed-off-by: Siarhei Volkau <lis8215@gmail.com> > Tested-by: Siarhei Volkau <lis8215@gmail.com> > Reviewed-by: Paul Cercueil <paul@crapouillou.net> > Cc: stable@vger.kernel.org > --- In the future please don't send patches in reply to previous versions. I don't see in thread view that this has been sent many times. Applied to clk-fixes ^ permalink raw reply [flat|nested] 8+ messages in thread
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[not found] <4FSS6R.0A48V2ZMZD7X1@crapouillou.net>
2022-02-05 9:45 ` [PATCH v3 0/1] clk: jz4725b: fix mmc0 clock gating Siarhei Volkau
2022-02-05 9:45 ` [PATCH v3 1/1] " Siarhei Volkau
2022-02-05 9:59 ` Greg KH
2022-02-05 12:15 ` Paul Cercueil
2022-02-05 12:48 ` Greg KH
2022-02-05 17:18 ` [PATCH v4 0/1] " Siarhei Volkau
2022-02-05 17:18 ` [PATCH v4 1/1] " Siarhei Volkau
2022-02-18 1:04 ` Stephen Boyd
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