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From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	stable@vger.kernel.org,
	"Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>,
	Catalin Marinas <catalin.marinas@arm.com>,
	James Morse <james.morse@arm.com>
Subject: [PATCH 5.10 40/43] KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated
Date: Wed,  9 Mar 2022 17:00:13 +0100	[thread overview]
Message-ID: <20220309155900.399494105@linuxfoundation.org> (raw)
In-Reply-To: <20220309155859.239810747@linuxfoundation.org>

From: James Morse <james.morse@arm.com>

commit a5905d6af492ee6a4a2205f0d550b3f931b03d03 upstream.

KVM allows the guest to discover whether the ARCH_WORKAROUND SMCCC are
implemented, and to preserve that state during migration through its
firmware register interface.

Add the necessary boiler plate for SMCCC_ARCH_WORKAROUND_3.

Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/include/uapi/asm/kvm.h |    5 +++++
 arch/arm64/kvm/hypercalls.c       |   12 ++++++++++++
 arch/arm64/kvm/psci.c             |   18 +++++++++++++++++-
 3 files changed, 34 insertions(+), 1 deletion(-)

--- a/arch/arm64/include/uapi/asm/kvm.h
+++ b/arch/arm64/include/uapi/asm/kvm.h
@@ -273,6 +273,11 @@ struct kvm_vcpu_events {
 #define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED	3
 #define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED     	(1U << 4)
 
+#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3	KVM_REG_ARM_FW_REG(3)
+#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL		0
+#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL		1
+#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED	2
+
 /* SVE registers */
 #define KVM_REG_ARM64_SVE		(0x15 << KVM_REG_ARM_COPROC_SHIFT)
 
--- a/arch/arm64/kvm/hypercalls.c
+++ b/arch/arm64/kvm/hypercalls.c
@@ -58,6 +58,18 @@ int kvm_hvc_call_handler(struct kvm_vcpu
 				break;
 			}
 			break;
+		case ARM_SMCCC_ARCH_WORKAROUND_3:
+			switch (arm64_get_spectre_bhb_state()) {
+			case SPECTRE_VULNERABLE:
+				break;
+			case SPECTRE_MITIGATED:
+				val = SMCCC_RET_SUCCESS;
+				break;
+			case SPECTRE_UNAFFECTED:
+				val = SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED;
+				break;
+			}
+			break;
 		case ARM_SMCCC_HV_PV_TIME_FEATURES:
 			val = SMCCC_RET_SUCCESS;
 			break;
--- a/arch/arm64/kvm/psci.c
+++ b/arch/arm64/kvm/psci.c
@@ -397,7 +397,7 @@ int kvm_psci_call(struct kvm_vcpu *vcpu)
 
 int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
 {
-	return 3;		/* PSCI version and two workaround registers */
+	return 4;		/* PSCI version and three workaround registers */
 }
 
 int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
@@ -411,6 +411,9 @@ int kvm_arm_copy_fw_reg_indices(struct k
 	if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, uindices++))
 		return -EFAULT;
 
+	if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, uindices++))
+		return -EFAULT;
+
 	return 0;
 }
 
@@ -450,6 +453,17 @@ static int get_kernel_wa_level(u64 regid
 		case SPECTRE_VULNERABLE:
 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
 		}
+		break;
+	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
+		switch (arm64_get_spectre_bhb_state()) {
+		case SPECTRE_VULNERABLE:
+			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
+		case SPECTRE_MITIGATED:
+			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL;
+		case SPECTRE_UNAFFECTED:
+			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED;
+		}
+		return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
 	}
 
 	return -EINVAL;
@@ -466,6 +480,7 @@ int kvm_arm_get_fw_reg(struct kvm_vcpu *
 		break;
 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
+	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
 		val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
 		break;
 	default:
@@ -511,6 +526,7 @@ int kvm_arm_set_fw_reg(struct kvm_vcpu *
 	}
 
 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
+	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
 		if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
 			return -EINVAL;
 



  parent reply	other threads:[~2022-03-09 16:11 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-09 15:59 [PATCH 5.10 00/43] 5.10.105-rc1 review Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 01/43] x86,bugs: Unconditionally allow spectre_v2=retpoline,amd Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 02/43] x86/speculation: Rename RETPOLINE_AMD to RETPOLINE_LFENCE Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 03/43] x86/speculation: Add eIBRS + Retpoline options Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 04/43] Documentation/hw-vuln: Update spectre doc Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 05/43] x86/speculation: Include unprivileged eBPF status in Spectre v2 mitigation reporting Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 06/43] x86/speculation: Use generic retpoline by default on AMD Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 07/43] x86/speculation: Update link to AMD speculation whitepaper Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 08/43] x86/speculation: Warn about Spectre v2 LFENCE mitigation Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 09/43] x86/speculation: Warn about eIBRS + LFENCE + Unprivileged eBPF + SMT Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 10/43] ARM: report Spectre v2 status through sysfs Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 11/43] ARM: early traps initialisation Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 12/43] ARM: use LOADADDR() to get load address of sections Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 13/43] ARM: Spectre-BHB workaround Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 14/43] ARM: include unprivileged BPF status in Spectre V2 reporting Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 15/43] arm64: cputype: Add CPU implementor & types for the Apple M1 cores Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 16/43] arm64: Add Neoverse-N2, Cortex-A710 CPU part definition Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 17/43] arm64: Add Cortex-X2 " Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 18/43] arm64: Add Cortex-A510 " Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 19/43] arm64: Add HWCAP for self-synchronising virtual counter Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 20/43] arm64: add ID_AA64ISAR2_EL1 sys register Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 21/43] arm64: cpufeature: add HWCAP for FEAT_AFP Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 22/43] arm64: cpufeature: add HWCAP for FEAT_RPRES Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 23/43] arm64: entry.S: Add ventry overflow sanity checks Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 24/43] arm64: spectre: Rename spectre_v4_patch_fw_mitigation_conduit Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 25/43] arm64: entry: Make the trampoline cleanup optional Greg Kroah-Hartman
2022-03-09 15:59 ` [PATCH 5.10 26/43] arm64: entry: Free up another register on kptis tramp_exit path Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 27/43] arm64: entry: Move the trampoline data page before the text page Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 28/43] arm64: entry: Allow tramp_alias to access symbols after the 4K boundary Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 29/43] arm64: entry: Dont assume tramp_vectors is the start of the vectors Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 30/43] arm64: entry: Move trampoline macros out of ifdefd section Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 31/43] arm64: entry: Make the kpti trampolines kpti sequence optional Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 32/43] arm64: entry: Allow the trampoline text to occupy multiple pages Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 33/43] arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 34/43] arm64: entry: Add vectors that have the bhb mitigation sequences Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 35/43] arm64: entry: Add macro for reading symbol addresses from the trampoline Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 36/43] arm64: Add percpu vectors for EL1 Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 37/43] arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2 Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 38/43] KVM: arm64: Allow indirect vectors to be used without SPECTRE_V3A Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 39/43] arm64: Mitigate spectre style branch history side channels Greg Kroah-Hartman
2022-03-09 16:00 ` Greg Kroah-Hartman [this message]
2022-03-09 16:00 ` [PATCH 5.10 41/43] arm64: Use the clearbhb instruction in mitigations Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 42/43] arm64: proton-pack: Include unprivileged eBPF status in Spectre v2 mitigation reporting Greg Kroah-Hartman
2022-03-09 16:00 ` [PATCH 5.10 43/43] ARM: fix build error when BPF_SYSCALL is disabled Greg Kroah-Hartman
2022-03-09 21:10 ` [PATCH 5.10 00/43] 5.10.105-rc1 review Daniel Díaz
2022-03-09 23:56 ` Fox Chen
2022-03-10  3:56 ` Samuel Zou
2022-03-10  4:19 ` Florian Fainelli
2022-03-10  6:22 ` Bagas Sanjaya
2022-03-10 11:35 ` Pavel Machek

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