[PATCH 5.17 0028/1126] dt-bindings: iio: adc: zynqmp_ams: Add clock entry

Greg Kroah-Hartman
2022-04-05T07:40:06Z

From: Robert Hancock <robert.hancock@calian.com>

commit 5165102efa41c2aedc77441612f4506a8a8671db upstream.

The AMS driver DT binding was missing the clock entry, which is actually
mandatory according to the driver implementation. Add this in.

Fixes: 39dd2d1e251d ("dt-bindings: iio: adc: Add Xilinx AMS binding documentation")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20220127173450.3684318-2-robert.hancock@calian.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml | 8 ++++++++
1 file changed, 8 insertions(+)

--- a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
@@ -92,6 +92,10 @@ properties:
description: AMS Controller register space
maxItems: 1

+ clocks:
+ items:
+ - description: AMS reference clock
+
ranges:
description:
Maps the child address space for PS and/or PL.
@@ -181,12 +185,15 @@ properties:
required:
- compatible
- reg
+ - clocks
- ranges

additionalProperties: false

examples:
- |
+ #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
+
bus {
#address-cells = <2>;
#size-cells = <2>;
@@ -196,6 +203,7 @@ examples:
interrupt-parent = <&gic>;
interrupts = <0 56 4>;
reg = <0x0 0xffa50000 0x0 0x800>;