* [PATCH 1/6] phy: qcom-qmp-combo: fix out-of-bounds clock access
[not found] <20221111084255.8963-1-johan+linaro@kernel.org>
@ 2022-11-11 8:42 ` Johan Hovold
2022-11-12 6:10 ` Dmitry Baryshkov
2022-11-11 8:42 ` [PATCH 2/6] phy: qcom-qmp-combo: fix sdm845 reset Johan Hovold
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Johan Hovold @ 2022-11-11 8:42 UTC (permalink / raw)
To: Vinod Koul
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Dmitry Baryshkov,
linux-arm-msm, linux-phy, linux-kernel, Johan Hovold, stable
The SM8250 only uses three clocks but the DP configuration erroneously
described four clocks.
In case the DP part of the PHY is initialised before the USB part, this
would lead to uninitialised memory beyond the bulk-clocks array to be
treated as a clock pointer as the clocks are requested based on the USB
configuration.
Fixes: aff188feb5e1 ("phy: qcom-qmp: add support for sm8250-usb3-dp phy")
Cc: stable@vger.kernel.org # 5.13
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 5e11b6a1d189..bb38b18258ca 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -1270,8 +1270,8 @@ static const struct qmp_phy_cfg sm8250_dpphy_cfg = {
.swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2,
.pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2,
- .clk_list = qmp_v4_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
+ .clk_list = qmp_v4_sm8250_usbphy_clk_l,
+ .num_clks = ARRAY_SIZE(qmp_v4_sm8250_usbphy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
--
2.37.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 1/6] phy: qcom-qmp-combo: fix out-of-bounds clock access
2022-11-11 8:42 ` [PATCH 1/6] phy: qcom-qmp-combo: fix out-of-bounds clock access Johan Hovold
@ 2022-11-12 6:10 ` Dmitry Baryshkov
0 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2022-11-12 6:10 UTC (permalink / raw)
To: Johan Hovold, Vinod Koul
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-arm-msm,
linux-phy, linux-kernel, stable
On 11/11/2022 11:42, Johan Hovold wrote:
> The SM8250 only uses three clocks but the DP configuration erroneously
> described four clocks.
>
> In case the DP part of the PHY is initialised before the USB part, this
> would lead to uninitialised memory beyond the bulk-clocks array to be
> treated as a clock pointer as the clocks are requested based on the USB
> configuration.
... because the num_clks comes from the struct qmp_phy_cfg, not from the
struct qcom_qmp.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> Fixes: aff188feb5e1 ("phy: qcom-qmp: add support for sm8250-usb3-dp phy")
> Cc: stable@vger.kernel.org # 5.13
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index 5e11b6a1d189..bb38b18258ca 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -1270,8 +1270,8 @@ static const struct qmp_phy_cfg sm8250_dpphy_cfg = {
> .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2,
> .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2,
>
> - .clk_list = qmp_v4_phy_clk_l,
> - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
> + .clk_list = qmp_v4_sm8250_usbphy_clk_l,
> + .num_clks = ARRAY_SIZE(qmp_v4_sm8250_usbphy_clk_l),
> .reset_list = msm8996_usb3phy_reset_l,
> .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
> .vreg_list = qmp_phy_vreg_l,
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/6] phy: qcom-qmp-combo: fix sdm845 reset
[not found] <20221111084255.8963-1-johan+linaro@kernel.org>
2022-11-11 8:42 ` [PATCH 1/6] phy: qcom-qmp-combo: fix out-of-bounds clock access Johan Hovold
@ 2022-11-11 8:42 ` Johan Hovold
2022-11-12 6:11 ` Dmitry Baryshkov
2022-11-11 8:42 ` [PATCH 3/6] phy: qcom-qmp-combo: fix sc8180x reset Johan Hovold
2022-11-11 8:42 ` [PATCH 4/6] phy: qcom-qmp-combo: fix broken power on Johan Hovold
3 siblings, 1 reply; 9+ messages in thread
From: Johan Hovold @ 2022-11-11 8:42 UTC (permalink / raw)
To: Vinod Koul
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Dmitry Baryshkov,
linux-arm-msm, linux-phy, linux-kernel, Johan Hovold, stable
The SDM845 has two resets but the DP configuration erroneously described
only one.
In case the DP part of the PHY is initialised before the USB part (e.g.
depending on probe order), then only the first reset would be asserted.
Add a dedicated configuration for SDM845 rather than reuse the
incompatible SC7180 configuration.
Fixes: d88497fb6bbd ("phy: qualcomm: phy-qcom-qmp: add support for combo USB3+DP phy on SDM845")
Cc: stable@vger.kernel.org # 6.1
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 39 ++++++++++++++++++++++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index bb38b18258ca..cc53e2f99121 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -1084,9 +1084,46 @@ static const struct qmp_phy_cfg sdm845_usb3phy_cfg = {
.has_pwrdn_delay = true,
};
+static const struct qmp_phy_cfg sdm845_dpphy_cfg = {
+ .type = PHY_TYPE_DP,
+ .lanes = 2,
+
+ .serdes_tbl = qmp_v3_dp_serdes_tbl,
+ .serdes_tbl_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl),
+ .tx_tbl = qmp_v3_dp_tx_tbl,
+ .tx_tbl_num = ARRAY_SIZE(qmp_v3_dp_tx_tbl),
+
+ .serdes_tbl_rbr = qmp_v3_dp_serdes_tbl_rbr,
+ .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_rbr),
+ .serdes_tbl_hbr = qmp_v3_dp_serdes_tbl_hbr,
+ .serdes_tbl_hbr_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr),
+ .serdes_tbl_hbr2 = qmp_v3_dp_serdes_tbl_hbr2,
+ .serdes_tbl_hbr2_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr2),
+ .serdes_tbl_hbr3 = qmp_v3_dp_serdes_tbl_hbr3,
+ .serdes_tbl_hbr3_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr3),
+
+ .swing_hbr_rbr = &qmp_dp_v3_voltage_swing_hbr_rbr,
+ .pre_emphasis_hbr_rbr = &qmp_dp_v3_pre_emphasis_hbr_rbr,
+ .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2,
+ .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2,
+
+ .clk_list = qmp_v3_phy_clk_l,
+ .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l),
+ .reset_list = msm8996_usb3phy_reset_l,
+ .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
+ .vreg_list = qmp_phy_vreg_l,
+ .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
+ .regs = qmp_v3_usb3phy_regs_layout,
+
+ .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init,
+ .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx,
+ .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy,
+ .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate,
+};
+
static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = {
.usb_cfg = &sdm845_usb3phy_cfg,
- .dp_cfg = &sc7180_dpphy_cfg,
+ .dp_cfg = &sdm845_dpphy_cfg,
};
static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
--
2.37.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 2/6] phy: qcom-qmp-combo: fix sdm845 reset
2022-11-11 8:42 ` [PATCH 2/6] phy: qcom-qmp-combo: fix sdm845 reset Johan Hovold
@ 2022-11-12 6:11 ` Dmitry Baryshkov
0 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2022-11-12 6:11 UTC (permalink / raw)
To: Johan Hovold, Vinod Koul
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-arm-msm,
linux-phy, linux-kernel, stable
On 11/11/2022 11:42, Johan Hovold wrote:
> The SDM845 has two resets but the DP configuration erroneously described
> only one.
>
> In case the DP part of the PHY is initialised before the USB part (e.g.
> depending on probe order), then only the first reset would be asserted.
>
> Add a dedicated configuration for SDM845 rather than reuse the
> incompatible SC7180 configuration.
>
> Fixes: d88497fb6bbd ("phy: qualcomm: phy-qcom-qmp: add support for combo USB3+DP phy on SDM845")
> Cc: stable@vger.kernel.org # 6.1
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 39 ++++++++++++++++++++++-
> 1 file changed, 38 insertions(+), 1 deletion(-)
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/6] phy: qcom-qmp-combo: fix sc8180x reset
[not found] <20221111084255.8963-1-johan+linaro@kernel.org>
2022-11-11 8:42 ` [PATCH 1/6] phy: qcom-qmp-combo: fix out-of-bounds clock access Johan Hovold
2022-11-11 8:42 ` [PATCH 2/6] phy: qcom-qmp-combo: fix sdm845 reset Johan Hovold
@ 2022-11-11 8:42 ` Johan Hovold
2022-11-12 7:51 ` Dmitry Baryshkov
2022-11-11 8:42 ` [PATCH 4/6] phy: qcom-qmp-combo: fix broken power on Johan Hovold
3 siblings, 1 reply; 9+ messages in thread
From: Johan Hovold @ 2022-11-11 8:42 UTC (permalink / raw)
To: Vinod Koul
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Dmitry Baryshkov,
linux-arm-msm, linux-phy, linux-kernel, Johan Hovold, stable
The SC8180X has two resets but the DP configuration erroneously
described only one.
In case the DP part of the PHY is initialised before the USB part (e.g.
depending on probe order), then only the first reset would be asserted.
Fixes: 1633802cd4ac ("phy: qcom: qmp: Add SC8180x USB/DP combo")
Cc: stable@vger.kernel.org # 5.15
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index cc53e2f99121..40c25a0ead23 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -1177,8 +1177,8 @@ static const struct qmp_phy_cfg sc8180x_dpphy_cfg = {
.clk_list = qmp_v3_phy_clk_l,
.num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l),
- .reset_list = sc7180_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(sc7180_usb3phy_reset_l),
+ .reset_list = msm8996_usb3phy_reset_l,
+ .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v3_usb3phy_regs_layout,
--
2.37.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 3/6] phy: qcom-qmp-combo: fix sc8180x reset
2022-11-11 8:42 ` [PATCH 3/6] phy: qcom-qmp-combo: fix sc8180x reset Johan Hovold
@ 2022-11-12 7:51 ` Dmitry Baryshkov
0 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2022-11-12 7:51 UTC (permalink / raw)
To: Johan Hovold, Vinod Koul
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-arm-msm,
linux-phy, linux-kernel, stable
On 11/11/2022 11:42, Johan Hovold wrote:
> The SC8180X has two resets but the DP configuration erroneously
> described only one.
>
> In case the DP part of the PHY is initialised before the USB part (e.g.
> depending on probe order), then only the first reset would be asserted.
>
> Fixes: 1633802cd4ac ("phy: qcom: qmp: Add SC8180x USB/DP combo")
> Cc: stable@vger.kernel.org # 5.15
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/6] phy: qcom-qmp-combo: fix broken power on
[not found] <20221111084255.8963-1-johan+linaro@kernel.org>
` (2 preceding siblings ...)
2022-11-11 8:42 ` [PATCH 3/6] phy: qcom-qmp-combo: fix sc8180x reset Johan Hovold
@ 2022-11-11 8:42 ` Johan Hovold
2022-11-12 6:15 ` Dmitry Baryshkov
3 siblings, 1 reply; 9+ messages in thread
From: Johan Hovold @ 2022-11-11 8:42 UTC (permalink / raw)
To: Vinod Koul
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Dmitry Baryshkov,
linux-arm-msm, linux-phy, linux-kernel, Johan Hovold, stable
The PHY is powered on during phy-init by setting the SW_PRWDN bit in the
COM_POWER_DOWN_CTRL register and then setting the same bit in the in the
PCS_POWER_DOWN_CONTROL register that belongs to the USB part of the
PHY.
Currently, whether power on succeeds depends on probe order and having
the USB part of the PHY be initialised first. In case the DP part of the
PHY is instead initialised first, the intended power on of the USB block
results in a corrupted DP_PHY register (e.g. DP_PHY_AUX_CFG8).
Add a pointer to the USB part of the PHY to the driver data and use that
to power on the PHY also if the DP part of the PHY is initialised first.
Fixes: 52e013d0bffa ("phy: qcom-qmp: Add support for DP in USB3+DP combo phy")
Cc: stable@vger.kernel.org # 5.10
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 40c25a0ead23..17707f68d482 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -932,6 +932,7 @@ struct qcom_qmp {
struct regulator_bulk_data *vregs;
struct qmp_phy **phys;
+ struct qmp_phy *usb_phy;
struct mutex phy_mutex;
int init_count;
@@ -1911,7 +1912,7 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
{
struct qcom_qmp *qmp = qphy->qmp;
const struct qmp_phy_cfg *cfg = qphy->cfg;
- void __iomem *pcs = qphy->pcs;
+ struct qmp_phy *usb_phy = qmp->usb_phy;
void __iomem *dp_com = qmp->dp_com;
int ret;
@@ -1963,7 +1964,8 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03);
qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
- qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN);
+ qphy_setbits(usb_phy->pcs, usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
+ SW_PWRDN);
mutex_unlock(&qmp->phy_mutex);
@@ -2831,6 +2833,8 @@ static int qmp_combo_probe(struct platform_device *pdev)
goto err_node_put;
}
+ qmp->usb_phy = qmp->phys[id];
+
/*
* Register the pipe clock provided by phy.
* See function description to see details of this pipe clock.
@@ -2846,6 +2850,9 @@ static int qmp_combo_probe(struct platform_device *pdev)
id++;
}
+ if (!qmp->usb_phy)
+ return -EINVAL;
+
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
return PTR_ERR_OR_ZERO(phy_provider);
--
2.37.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 4/6] phy: qcom-qmp-combo: fix broken power on
2022-11-11 8:42 ` [PATCH 4/6] phy: qcom-qmp-combo: fix broken power on Johan Hovold
@ 2022-11-12 6:15 ` Dmitry Baryshkov
2022-11-14 7:48 ` Johan Hovold
0 siblings, 1 reply; 9+ messages in thread
From: Dmitry Baryshkov @ 2022-11-12 6:15 UTC (permalink / raw)
To: Johan Hovold, Vinod Koul
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-arm-msm,
linux-phy, linux-kernel, stable
On 11/11/2022 11:42, Johan Hovold wrote:
> The PHY is powered on during phy-init by setting the SW_PRWDN bit in the
Nit: SW_PWRDN
> COM_POWER_DOWN_CTRL register and then setting the same bit in the in the
> PCS_POWER_DOWN_CONTROL register that belongs to the USB part of the
> PHY.
>
> Currently, whether power on succeeds depends on probe order and having
> the USB part of the PHY be initialised first. In case the DP part of the
> PHY is instead initialised first, the intended power on of the USB block
> results in a corrupted DP_PHY register (e.g. DP_PHY_AUX_CFG8).
>
> Add a pointer to the USB part of the PHY to the driver data and use that
> to power on the PHY also if the DP part of the PHY is initialised first.
>
> Fixes: 52e013d0bffa ("phy: qcom-qmp: Add support for DP in USB3+DP combo phy")
> Cc: stable@vger.kernel.org # 5.10
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
I can only hope that at some point in your cleanup this hack is going to
be removed.
Nevertheless, I don't see a good way to do this at this moment. Thus:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index 40c25a0ead23..17707f68d482 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -932,6 +932,7 @@ struct qcom_qmp {
> struct regulator_bulk_data *vregs;
>
> struct qmp_phy **phys;
> + struct qmp_phy *usb_phy;
>
> struct mutex phy_mutex;
> int init_count;
> @@ -1911,7 +1912,7 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
> {
> struct qcom_qmp *qmp = qphy->qmp;
> const struct qmp_phy_cfg *cfg = qphy->cfg;
> - void __iomem *pcs = qphy->pcs;
> + struct qmp_phy *usb_phy = qmp->usb_phy;
> void __iomem *dp_com = qmp->dp_com;
> int ret;
>
> @@ -1963,7 +1964,8 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
> qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03);
> qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
>
> - qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN);
> + qphy_setbits(usb_phy->pcs, usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
> + SW_PWRDN);
>
> mutex_unlock(&qmp->phy_mutex);
>
> @@ -2831,6 +2833,8 @@ static int qmp_combo_probe(struct platform_device *pdev)
> goto err_node_put;
> }
>
> + qmp->usb_phy = qmp->phys[id];
> +
> /*
> * Register the pipe clock provided by phy.
> * See function description to see details of this pipe clock.
> @@ -2846,6 +2850,9 @@ static int qmp_combo_probe(struct platform_device *pdev)
> id++;
> }
>
> + if (!qmp->usb_phy)
> + return -EINVAL;
> +
> phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
>
> return PTR_ERR_OR_ZERO(phy_provider);
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 4/6] phy: qcom-qmp-combo: fix broken power on
2022-11-12 6:15 ` Dmitry Baryshkov
@ 2022-11-14 7:48 ` Johan Hovold
0 siblings, 0 replies; 9+ messages in thread
From: Johan Hovold @ 2022-11-14 7:48 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Johan Hovold, Vinod Koul, Andy Gross, Bjorn Andersson,
Konrad Dybcio, linux-arm-msm, linux-phy, linux-kernel, stable
On Sat, Nov 12, 2022 at 09:15:43AM +0300, Dmitry Baryshkov wrote:
> On 11/11/2022 11:42, Johan Hovold wrote:
> > The PHY is powered on during phy-init by setting the SW_PRWDN bit in the
>
> Nit: SW_PWRDN
>
> > COM_POWER_DOWN_CTRL register and then setting the same bit in the in the
> > PCS_POWER_DOWN_CONTROL register that belongs to the USB part of the
> > PHY.
> >
> > Currently, whether power on succeeds depends on probe order and having
> > the USB part of the PHY be initialised first. In case the DP part of the
> > PHY is instead initialised first, the intended power on of the USB block
> > results in a corrupted DP_PHY register (e.g. DP_PHY_AUX_CFG8).
> >
> > Add a pointer to the USB part of the PHY to the driver data and use that
> > to power on the PHY also if the DP part of the PHY is initialised first.
> >
> > Fixes: 52e013d0bffa ("phy: qcom-qmp: Add support for DP in USB3+DP combo phy")
> > Cc: stable@vger.kernel.org # 5.10
> > Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
>
> I can only hope that at some point in your cleanup this hack is going to
> be removed.
> Nevertheless, I don't see a good way to do this at this moment. Thus:
Not sure why you're calling this a hack. This is how the hardware works
and pretending that this PHY is some kind of MFD with completely
independent components is partly what resulted in this mess.
Accessing the USB registers by means of a hard-coded index in the PHY
array as is done in the runtime PM callbacks is a hack (see patch 5/6),
adding a dedicated pointer is not.
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Johan
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