From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0756C4332F for ; Fri, 18 Nov 2022 12:48:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231534AbiKRMso (ORCPT ); Fri, 18 Nov 2022 07:48:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241920AbiKRMs3 (ORCPT ); Fri, 18 Nov 2022 07:48:29 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA0106541 for ; Fri, 18 Nov 2022 04:48:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668775707; x=1700311707; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Mkj4TgvRycwlvMe5TQW0lIuT4Fg+StCZNFTIHSyS/zE=; b=C0MKv1jFDolOF6FrES+HkQeuUtb8YvTJSt+cmmWVa6wV9fL+O3uFQ4Cy GLybdjGFNXX8o0EzkbRiCMeotBeSP4ZjJ0JqOLRwEwtadtHir6/WWVjzH EzuWpQJFKP+9gQ76gJr7yJudDSvcITALQwdpYV+/DVP+/yzxasdoBr58G 590CiUy17C48YiNBof70FDoC6D+yXyXcBcCjM+GWBRpLLh0qziZe77oBA N5bH2MfTyaOUpzVYScwftTdYJetHWIqteFDgKw9tsLGyzlfK3ErZIYFC3 sULGpnKMQgWGeFBCGxjWn8G1vs6/e2PkMakKPDimPNrY8C0XMpHMR6vy0 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10534"; a="314946339" X-IronPort-AV: E=Sophos;i="5.96,174,1665471600"; d="scan'208";a="314946339" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2022 04:48:27 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10534"; a="671306955" X-IronPort-AV: E=Sophos;i="5.96,174,1665471600"; d="scan'208";a="671306955" Received: from bbaker-mobl.ger.corp.intel.com (HELO mwauld-desk1.intel.com) ([10.252.1.50]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2022 04:48:25 -0800 From: Matthew Auld To: intel-gfx@lists.freedesktop.org Cc: Chris Wilson , Andrzej Hajda , Nirmoy Das , stable@vger.kernel.org Subject: [PATCH 1/2] drm/i915/migrate: Account for the reserved_space Date: Fri, 18 Nov 2022 12:48:15 +0000 Message-Id: <20221118124816.545034-1-matthew.auld@intel.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Chris Wilson If the ring is nearly full when calling into emit_pte(), we might incorrectly trample the reserved_space when constructing the packet to emit the PTEs. This then triggers the GEM_BUG_ON(rq->reserved_space > ring->space) when later submitting the request, since the request itself doesn't have enough space left in the ring to emit things like workarounds, breadcrumbs etc. Testcase: igt@i915_selftests@live_emit_pte_full_ring Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7535 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6889 Fixes: cf586021642d ("drm/i915/gt: Pipelined page migration") Signed-off-by: Chris Wilson Signed-off-by: Matthew Auld Cc: Andrzej Hajda Cc: Nirmoy Das Cc: # v5.15+ --- drivers/gpu/drm/i915/gt/intel_migrate.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index b405a04135ca..48c3b5168558 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -342,6 +342,16 @@ static int emit_no_arbitration(struct i915_request *rq) return 0; } +static int max_pte_pkt_size(struct i915_request *rq, int pkt) +{ + struct intel_ring *ring = rq->ring; + + pkt = min_t(int, pkt, (ring->space - rq->reserved_space) / sizeof(u32) + 5); + pkt = min_t(int, pkt, (ring->size - ring->emit) / sizeof(u32) + 5); + + return pkt; +} + static int emit_pte(struct i915_request *rq, struct sgt_dma *it, enum i915_cache_level cache_level, @@ -388,8 +398,7 @@ static int emit_pte(struct i915_request *rq, return PTR_ERR(cs); /* Pack as many PTE updates as possible into a single MI command */ - pkt = min_t(int, dword_length, ring->space / sizeof(u32) + 5); - pkt = min_t(int, pkt, (ring->size - ring->emit) / sizeof(u32) + 5); + pkt = max_pte_pkt_size(rq, dword_length); hdr = cs; *cs++ = MI_STORE_DATA_IMM | REG_BIT(21); /* as qword elements */ @@ -422,8 +431,7 @@ static int emit_pte(struct i915_request *rq, } } - pkt = min_t(int, dword_rem, ring->space / sizeof(u32) + 5); - pkt = min_t(int, pkt, (ring->size - ring->emit) / sizeof(u32) + 5); + pkt = max_pte_pkt_size(rq, dword_rem); hdr = cs; *cs++ = MI_STORE_DATA_IMM | REG_BIT(21); -- 2.38.1