From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6D6EC64ED6 for ; Mon, 27 Feb 2023 02:32:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231434AbjB0CcN (ORCPT ); Sun, 26 Feb 2023 21:32:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229773AbjB0Cb4 (ORCPT ); Sun, 26 Feb 2023 21:31:56 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2FBD1B32E; Sun, 26 Feb 2023 18:30:08 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 9B77CB80C97; Mon, 27 Feb 2023 02:04:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 557B1C433D2; Mon, 27 Feb 2023 02:04:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1677463462; bh=BcooHMkKchI7uGuazEcusz5SQoQ/MT5hC43jqQA0jtg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Bt0F7TWfEQg+Moz7DcRdfoj3hzHjXWdkrt/4mSA+MU4bPjF3U01hASTtO8v31GLvA mnQXJyT236iFtrJjPeCnVbZnZfF5UmhkpPL2nuj0AXWKfAnQC3hL0/ZKnPFUp2/BZI Lhu+WFfuUnHeeaOo46Dz1i77iVdYPvBKaxTn8domEwArKhcp5U0rdsS1LF4mPQE+ee Ujliq7ygGYYoJvq84+pv5pq3BgFub2YCbZjNOF5B+foXyvdKxwa64PBIN0ZSwxDdhK nUn5ByhDkmdLe3+evszQ8fFD2UqX7izrdeAVXeDr7uFY3tA9ZlRrut3W0AWPeFFHRc BV8aYR67JQAmA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Nicholas Kazlauskas , Hansen Dsouza , Qingqing Zhuo , Daniel Wheeler , Alex Deucher , Sasha Levin , harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, Charlene.Liu@amd.com, alex.hung@amd.com, sancchen@amd.com, mwen@igalia.com, Daniel.Miess@amd.com, gabe.teeger@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.2 51/60] drm/amd/display: Enable P-state validation checks for DCN314 Date: Sun, 26 Feb 2023 21:00:36 -0500 Message-Id: <20230227020045.1045105-51-sashal@kernel.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230227020045.1045105-1-sashal@kernel.org> References: <20230227020045.1045105-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Nicholas Kazlauskas [ Upstream commit 37d184b548db0f64d4a878960b2c6988b38a3e7e ] [Why] To align with DCN31 behavior. This helps avoid p-state hangs in the case where underflow does occur. [How] Flip the bit to true. Reviewed-by: Hansen Dsouza Acked-by: Qingqing Zhuo Signed-off-by: Nicholas Kazlauskas Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c index 79850a68f62ab..bc7f2b735327e 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c @@ -901,7 +901,7 @@ static const struct dc_debug_options debug_defaults_drv = { .max_downscale_src_width = 4096,/*upto true 4k*/ .disable_pplib_wm_range = false, .scl_reset_length10 = true, - .sanity_checks = false, + .sanity_checks = true, .underflow_assert_delay_us = 0xFFFFFFFF, .dwb_fi_phase = -1, // -1 = disable, .dmub_command_table = true, -- 2.39.0