From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3672AC77B7F for ; Sat, 13 May 2023 07:42:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231358AbjEMHmC (ORCPT ); Sat, 13 May 2023 03:42:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230453AbjEMHmB (ORCPT ); Sat, 13 May 2023 03:42:01 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27C0C2738 for ; Sat, 13 May 2023 00:41:59 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7FAC661C04 for ; Sat, 13 May 2023 07:41:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ECC54C433D2; Sat, 13 May 2023 07:41:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1683963718; bh=Q3Gq/x/wm0WWEgIo0Fnqt7aBepwd6C8qtNfQP6kHawU=; h=Subject:To:Cc:From:Date:From; b=mae6fktNWUe5NtN9+AygeVFoj6ii3wNKTRAyRIZE/EtW2ytCVmUbtc4fpHhqRi9iQ 6LHrEEFFzXr0hvxupwgJnsATXzd81kLhCEP8fN6fiq7F8Unei/f4GBIg9/dz1UOpbK jR8gg7uRvgKzWSj3Dnonjcn7MoBLOzS9PaETLOig= Subject: FAILED: patch "[PATCH] drm/amd/display: Do not set DRR on pipe Commit" failed to apply to 6.3-stable tree To: Wesley.Chalmers@amd.com, Jun.Lei@amd.com, alexander.deucher@amd.com, daniel.wheeler@amd.com, mario.limonciello@amd.com, qingqing.zhuo@amd.com Cc: From: Date: Sat, 13 May 2023 16:21:33 +0900 Message-ID: <2023051333-matcher-chihuahua-80da@gregkh> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org The patch below does not apply to the 6.3-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . To reproduce the conflict and resubmit, you may use the following commands: git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.3.y git checkout FETCH_HEAD git cherry-pick -x 825b3772a2047bd32ed3b3914234da0de19ef2e0 # git commit -s git send-email --to '' --in-reply-to '2023051333-matcher-chihuahua-80da@gregkh' --subject-prefix 'PATCH 6.3.y' HEAD^.. Possible dependencies: 825b3772a204 ("drm/amd/display: Do not set DRR on pipe Commit") 36951fc9460f ("Revert "drm/amd/display: Do not set DRR on pipe commit"") thanks, greg k-h ------------------ original commit in Linus's tree ------------------ >From 825b3772a2047bd32ed3b3914234da0de19ef2e0 Mon Sep 17 00:00:00 2001 From: Wesley Chalmers Date: Thu, 3 Nov 2022 22:29:31 -0400 Subject: [PATCH] drm/amd/display: Do not set DRR on pipe Commit [WHY] Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a pipe commit can cause underflow. Cc: stable@vger.kernel.org Cc: Mario Limonciello Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo Signed-off-by: Wesley Chalmers Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c index 586de81fc2da..6d328b7e07a8 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c @@ -990,8 +990,5 @@ void dcn30_prepare_bandwidth(struct dc *dc, dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz); dcn20_prepare_bandwidth(dc, context); - - dc_dmub_srv_p_state_delegate(dc, - context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching, context); }