From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9735C001DF for ; Tue, 25 Jul 2023 11:45:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230155AbjGYLpK (ORCPT ); Tue, 25 Jul 2023 07:45:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231846AbjGYLpA (ORCPT ); Tue, 25 Jul 2023 07:45:00 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B122B7 for ; Tue, 25 Jul 2023 04:44:59 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0FD3361648 for ; Tue, 25 Jul 2023 11:44:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2131EC433C7; Tue, 25 Jul 2023 11:44:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1690285498; bh=jg8a9TNctlXGucDkBucnLXcdl8ME532kJbFcdNF1fD0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k/DjZ/TOBLzncsN5rKX6F7E3ZltcPHYbuUR/2UmJzQXpIla2VD6yqfwWN7Yk8pdXz FRXHP6KI2LG9IZNDpdg2nr4aB6BJzi9EpJ2IvFHcPsrJ20YPPGp/Htc/irFCNUNVq9 vLf8ncCrYTi39FIeUPslr/nOcFGIXcu4QpK19/94= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Mario Limonciello , Linus Walleij Subject: [PATCH 5.4 227/313] pinctrl: amd: Fix mistake in handling clearing pins at startup Date: Tue, 25 Jul 2023 12:46:20 +0200 Message-ID: <20230725104530.875263120@linuxfoundation.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230725104521.167250627@linuxfoundation.org> References: <20230725104521.167250627@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mario Limonciello commit a855724dc08b8cb0c13ab1e065a4922f1e5a7552 upstream. commit 4e5a04be88fe ("pinctrl: amd: disable and mask interrupts on probe") had a mistake in loop iteration 63 that it would clear offset 0xFC instead of 0x100. Offset 0xFC is actually `WAKE_INT_MASTER_REG`. This was clearing bits 13 and 15 from the register which significantly changed the expected handling for some platforms for GPIO0. Cc: stable@vger.kernel.org Link: https://bugzilla.kernel.org/show_bug.cgi?id=217315 Signed-off-by: Mario Limonciello Link: https://lore.kernel.org/r/20230421120625.3366-3-mario.limonciello@amd.com Signed-off-by: Linus Walleij Signed-off-by: Greg Kroah-Hartman --- drivers/pinctrl/pinctrl-amd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c @@ -790,9 +790,9 @@ static void amd_gpio_irq_init(struct amd raw_spin_lock_irqsave(&gpio_dev->lock, flags); - pin_reg = readl(gpio_dev->base + i * 4); + pin_reg = readl(gpio_dev->base + pin * 4); pin_reg &= ~mask; - writel(pin_reg, gpio_dev->base + i * 4); + writel(pin_reg, gpio_dev->base + pin * 4); raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); }