From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71A23EE49AF for ; Tue, 22 Aug 2023 11:38:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235318AbjHVLiT (ORCPT ); Tue, 22 Aug 2023 07:38:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235097AbjHVLiG (ORCPT ); Tue, 22 Aug 2023 07:38:06 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA06EE4A; Tue, 22 Aug 2023 04:37:36 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 77465642D1; Tue, 22 Aug 2023 11:36:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 06514C433C8; Tue, 22 Aug 2023 11:36:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692704181; bh=mWSMZxxPFeZtx5ZSwOL70WwFeclugfVCWSNWY3eQCt8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ij9SRDhUMtuEGusKdFCse5pUIjP/e1kHyC/EogKfAFe89muz3GupDqA5xM6ZynKoZ 7D2ZvGUEcQVIOPBoTJy9MctvwhZu0QnoNOcoXtK4qnngStJn837iFFQ2kpTMJUnfh4 +4KtmYTuktpqUwk3c6uPh/kPAuASIwA7aAruu3IN7FrLMZJPoGzkVNS5X6r9phFtyV 8uhed3bu+yD+njedkm2S4f2zbKn8Q/TOe/uznM2Hl/u1lJDFk3HsntVrCYTn74dfpj aYxiMYLdBYxZ6+qvGijcwP61B6YhK20HIPXdV8iH23dBn9rbkyEltdC/ZYGOn+z6v3 UpmRSP7Gw4w8g== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Lijo Lazar , Alex Deucher , Sasha Levin , christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, Hawking.Zhang@amd.com, candice.li@amd.com, john.clements@amd.com, mario.limonciello@amd.com, Likun.Gao@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.4 08/11] drm/amdgpu: Match against exact bootloader status Date: Tue, 22 Aug 2023 07:35:50 -0400 Message-Id: <20230822113553.3551206-8-sashal@kernel.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230822113553.3551206-1-sashal@kernel.org> References: <20230822113553.3551206-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.4.11 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Lijo Lazar [ Upstream commit d3de41ee5febe5c2d9989fe9810bce2bb54a3a8e ] On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the least significant bits for any command submission. Hence match against the exact register value, otherwise a register value of all 0xFFs also could falsely indicate that boot loader is ready. Also, from PSP v13.0.6 and newer, bits[7:0] will be used to indicate command error status. Signed-off-by: Lijo Lazar Acked-by: Alex Deucher Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c index caee76ab71105..92f2ee412908d 100644 --- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c +++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c @@ -136,14 +136,15 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context *psp) int ret; int retry_loop; + /* Wait for bootloader to signify that it is ready having bit 31 of + * C2PMSG_35 set to 1. All other bits are expected to be cleared. + * If there is an error in processing command, bits[7:0] will be set. + * This is applicable for PSP v13.0.6 and newer. + */ for (retry_loop = 0; retry_loop < 10; retry_loop++) { - /* Wait for bootloader to signify that is - ready having bit 31 of C2PMSG_35 set to 1 */ - ret = psp_wait_for(psp, - SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35), - 0x80000000, - 0x80000000, - false); + ret = psp_wait_for( + psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35), + 0x80000000, 0xffffffff, false); if (ret == 0) return 0; -- 2.40.1