From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EA01CDB47E for ; Sun, 15 Oct 2023 20:27:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230200AbjJOU1u (ORCPT ); Sun, 15 Oct 2023 16:27:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229990AbjJOU1t (ORCPT ); Sun, 15 Oct 2023 16:27:49 -0400 Received: from mail.alien8.de (mail.alien8.de [65.109.113.108]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28DA7AB for ; Sun, 15 Oct 2023 13:27:48 -0700 (PDT) Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.alien8.de (SuperMail on ZX Spectrum 128k) with ESMTP id 7C2EF40E014B; Sun, 15 Oct 2023 20:27:46 +0000 (UTC) X-Virus-Scanned: Debian amavisd-new at mail.alien8.de Authentication-Results: mail.alien8.de (amavisd-new); dkim=fail (4096-bit key) reason="fail (body has been altered)" header.d=alien8.de Received: from mail.alien8.de ([127.0.0.1]) by localhost (mail.alien8.de [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id CAyPi_pnU8Tv; Sun, 15 Oct 2023 20:27:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=alien8; t=1697401661; bh=0vY00s8+DHxDMpNTLXTZ1Sl1McWA3MjIu8umbUQ3unY=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=idAr7sDq9eRJwTfKTMbUVBdeLwzDU5HICQ1SqYNr5ykoLzjadShXcjE8XWRjqtgcJ Pt3tHDvoMNYeN6cen5btgfHOXTEOBiZpRbBbYEDTZ+GSnsiT9Qjv/i4xlt9+A0h7Mi VHhhEpZLVrLtYqC+/TBXjo33bFPianfoXF0MWiYLqnymdhmGdplgt24b9VgAvtM9AI arpEIMMNYIpo2D/VO3IGvRYbO5LQsmz6tCnp57TK8yWHTHbhLaLnUaKzzVyARGo5mH u2GdQhYPbRKohkiVqc09gx/TVonwVo5s1/kImu64kpMw5WcGcJoELNMDLshJqe1+Wy Z3HuJZFm3N/i0i8V5+MOkrPdjIN9BQ6p5nKhxOFO3jdluRY6LD3LAbK/QmRNe0Kp56 g+Ku2DgP7Bcf+GbVZG8cib+LOhGEBIO0hrrrqBYwGsDAiPy2ZkXGFAH0OeV3fYn/NK wzI+wooFaiAYyd41lJvvXXDN8RKQpfj5TP7zVUxCGJZyJE8Wu6EoG9a83pYQ0NpnIX G6twlK9SWHmTM+FX3i5EgaEtTWlIuxHN+I/0YvqcXAHIu5ET0VJ3Y+rUsn9DF5X3++ pRQEYcklRBT3LnBOCWP2zUxivh5gBcXP+50PNtObX0tOjOgktd4BGd/c/xOQQMmmaH CfJFtabE2k6PQ8tqQr8qG04s= Received: from zn.tnic (pd953036a.dip0.t-ipconnect.de [217.83.3.106]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-256) server-digest SHA256) (No client certificate requested) by mail.alien8.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id B6C5E40E01AE; Sun, 15 Oct 2023 20:27:37 +0000 (UTC) Date: Sun, 15 Oct 2023 22:27:36 +0200 From: Borislav Petkov To: gregkh@linuxfoundation.org Cc: rene@exactcode.de, stable@kernel.org, stable@vger.kernel.org Subject: Re: FAILED: patch "[PATCH] x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs" failed to apply to 4.19-stable tree Message-ID: <20231015202736.GDZSxLOD71VupGuYzd@fat_crate.local> References: <2023101527-arrogant-overdue-b9b4@gregkh> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <2023101527-arrogant-overdue-b9b4@gregkh> Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: "Borislav Petkov (AMD)" Date: Sat, 7 Oct 2023 12:57:02 +0200 Subject: [PATCH] x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs MIME-Version: 1.0 Content-Type: text/plain; charset=3DUTF-8 Content-Transfer-Encoding: 8bit Upstream commit f454b18e07f518bcd0c05af17a2239138bff52de. Fix erratum #1485 on Zen4 parts where running with STIBP disabled can cause an #UD exception. The performance impact of the fix is negligible. Reported-by: Ren=C3=A9 Rebe Signed-off-by: Borislav Petkov (AMD) Tested-by: Ren=C3=A9 Rebe Cc: Link: https://lore.kernel.org/r/D99589F4-BC5D-430B-87B2-72C20370CF57@exac= tcode.com --- arch/x86/include/asm/msr-index.h | 4 ++++ arch/x86/kernel/cpu/amd.c | 8 ++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-= index.h index efedd16231ff..2ee7b3e0dcc1 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -446,6 +446,10 @@ =20 #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f =20 +/* Zen4 */ +#define MSR_ZEN4_BP_CFG 0xc001102e +#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5 + /* Fam 17h MSRs */ #define MSR_F17H_IRPERF 0xc00000e9 =20 diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 69eb6a804d1d..dc41d4d7836e 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -72,6 +72,10 @@ static const int amd_zenbleed[] =3D AMD_MODEL_RANGE(0x17, 0x90, 0x0, 0x91, 0xf), AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf)); =20 +static const int amd_erratum_1485[] =3D + AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf), + AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf)); + static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erra= tum) { int osvw_id =3D *erratum++; @@ -1122,6 +1126,10 @@ static void init_amd(struct cpuinfo_x86 *c) check_null_seg_clears_base(c); =20 zenbleed_check(c); + + if (!cpu_has(c, X86_FEATURE_HYPERVISOR) && + cpu_has_amd_erratum(c, amd_erratum_1485)) + msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT); } =20 #ifdef CONFIG_X86_32 --=20 2.42.0.rc0.25.ga82fb66fed25 --=20 Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette