From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0C9CC4332F for ; Tue, 31 Oct 2023 17:46:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376377AbjJaRq6 (ORCPT ); Tue, 31 Oct 2023 13:46:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1376413AbjJaRq4 (ORCPT ); Tue, 31 Oct 2023 13:46:56 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6220FC for ; Tue, 31 Oct 2023 10:46:52 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14721C433C7; Tue, 31 Oct 2023 17:46:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1698774412; bh=BIOKIGQCPMis/LiKKxIMQMAuehoBF8N8Q1s9mQK67Uw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=q2Bl1XsNDYi7tXt2hq0ifoPT89CQoR1wKLVnd13lensUwYtAS3VG1MChEegf4bQjl jhx0VXqayehsy9wZ98zJlNMSPHO8s4a4lXT2pd1ihtMX/CTot00SrFVYYSzY4CAmgk 5ITgdGVJfE9PaHXvnsXPBllLmn/ckcrxOREw/V8M= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Alex Bee , Heiko Stuebner Subject: [PATCH 6.5 038/112] ARM: dts: rockchip: Fix timer clocks for RK3128 Date: Tue, 31 Oct 2023 18:00:39 +0100 Message-ID: <20231031165902.516888138@linuxfoundation.org> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031165901.318222981@linuxfoundation.org> References: <20231031165901.318222981@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org 6.5-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alex Bee commit 2c68d26f072b449bd45427241612cb3f8f997f82 upstream. Currently the Rockchip timer source clocks are set to xin24 for no obvious reason and the actual timer clocks (SCLK_TIMER*) will get disabled during boot process as they have no user. That will make the SoC stuck as no timer source exists. Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi") Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20230829203721.281455-12-knaerzche@gmail.com Signed-off-by: Heiko Stuebner Signed-off-by: Greg Kroah-Hartman --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 9125bf22e971..88a4b0d6d928 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -234,7 +234,7 @@ timer0: timer@20044000 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x20044000 0x20>; interrupts = ; - clocks = <&cru PCLK_TIMER>, <&xin24m>; + clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>; clock-names = "pclk", "timer"; }; @@ -242,7 +242,7 @@ timer1: timer@20044020 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x20044020 0x20>; interrupts = ; - clocks = <&cru PCLK_TIMER>, <&xin24m>; + clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER1>; clock-names = "pclk", "timer"; }; @@ -250,7 +250,7 @@ timer2: timer@20044040 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x20044040 0x20>; interrupts = ; - clocks = <&cru PCLK_TIMER>, <&xin24m>; + clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER2>; clock-names = "pclk", "timer"; }; @@ -258,7 +258,7 @@ timer3: timer@20044060 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x20044060 0x20>; interrupts = ; - clocks = <&cru PCLK_TIMER>, <&xin24m>; + clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER3>; clock-names = "pclk", "timer"; }; @@ -266,7 +266,7 @@ timer4: timer@20044080 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x20044080 0x20>; interrupts = ; - clocks = <&cru PCLK_TIMER>, <&xin24m>; + clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER4>; clock-names = "pclk", "timer"; }; @@ -274,7 +274,7 @@ timer5: timer@200440a0 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x200440a0 0x20>; interrupts = ; - clocks = <&cru PCLK_TIMER>, <&xin24m>; + clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER5>; clock-names = "pclk", "timer"; }; -- 2.42.0