From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Sanath S <Sanath.S@amd.com>
Cc: andreas.noever@gmail.com, michael.jamet@intel.com,
YehezkelShB@gmail.com, linux-usb@vger.kernel.org,
linux-kernel@vger.kernel.org,
Mario Limonciello <mario.limonciello@amd.com>,
stable@vger.kernel.org
Subject: Re: [Patch v2] thunderbolt: Add quirk to reset downstream port
Date: Wed, 22 Nov 2023 09:32:35 +0200 [thread overview]
Message-ID: <20231122073235.GU1074920@black.fi.intel.com> (raw)
In-Reply-To: <20231122060316.GT1074920@black.fi.intel.com>
On Wed, Nov 22, 2023 at 08:03:16AM +0200, Mika Westerberg wrote:
> also please make it a separate function, tb_port_reset() following the
> similar tb_port_unlock() and friends. With the matching kernel-doc and
> everything.
>
> > + val = val | PORT_CS_19_DPR;
> > + ret = tb_port_write(port, &val, TB_CFG_PORT,
> > + port->cap_usb4 + PORT_CS_19, 1);
>
> Since it is using cap_usb4 you probably need to make usb4_port_reset()
> as well that gets called from tb_port_reset() (try to make it as simple
> as possible though).
Also please make sure it follows the CM guide 7.2 "Downstream Port Reset
and Change of Link Parameters" so that it observes the 10ms delay and
such.
next prev parent reply other threads:[~2023-11-22 7:32 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-22 5:06 [Patch v2] thunderbolt: Add quirk to reset downstream port Sanath S
2023-11-22 6:03 ` Mika Westerberg
2023-11-22 7:32 ` Mika Westerberg [this message]
2023-11-22 15:43 ` Mario Limonciello
2023-11-23 5:16 ` Sanath S
2023-11-23 6:05 ` Mika Westerberg
2023-11-23 6:23 ` Mario Limonciello
2023-11-23 6:57 ` Mika Westerberg
2023-11-23 6:00 ` Mika Westerberg
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