From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2B716FB1; Tue, 5 Dec 2023 03:30:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="ikqeMaBZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 82873C433C8; Tue, 5 Dec 2023 03:30:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1701747034; bh=QvwDhS3diZmnOZeBTtJVb6HTEyCsdftyn2qnisQ00lU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ikqeMaBZ/sattaBOh/NEpYsceZz0cN2x3NASbILviPeP6jG5ouogo4+M/Auf3P3B7 5NhpPKA1qx1MAywyhQqdCUfm5yKJn8TmOKfggsgoGSL1gTnmXAG8eGtAPNpn1MkNNP 9Xi8R+1zQ1DIog+NQC81SOvJ7BDRB89VQbS0GY7Q= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, "Abdul Halim, Mohd Syazwan" , Lu Baolu , Joerg Roedel , Abdul, Halim Subject: [PATCH 6.1 033/107] iommu/vt-d: Add MTL to quirk list to skip TE disabling Date: Tue, 5 Dec 2023 12:16:08 +0900 Message-ID: <20231205031533.593523273@linuxfoundation.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231205031531.426872356@linuxfoundation.org> References: <20231205031531.426872356@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Abdul Halim, Mohd Syazwan commit 85b80fdffa867d75dfb9084a839e7949e29064e8 upstream. The VT-d spec requires (10.4.4 Global Command Register, TE field) that: Hardware implementations supporting DMA draining must drain any in-flight DMA read/write requests queued within the Root-Complex before switching address translation on or off and reflecting the status of the command through the TES field in the Global Status register. Unfortunately, some integrated graphic devices fail to do so after some kind of power state transition. As the result, the system might stuck in iommu_disable_translation(), waiting for the completion of TE transition. Add MTL to the quirk list for those devices and skips TE disabling if the qurik hits. Fixes: b1012ca8dc4f ("iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu") Cc: stable@vger.kernel.org Signed-off-by: Abdul Halim, Mohd Syazwan Signed-off-by: Lu Baolu Link: https://lore.kernel.org/r/20231116022324.30120-1-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel Signed-off-by: Greg Kroah-Hartman --- drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4872,7 +4872,7 @@ static void quirk_igfx_skip_te_disable(s ver = (dev->device >> 8) & 0xff; if (ver != 0x45 && ver != 0x46 && ver != 0x4c && ver != 0x4e && ver != 0x8a && ver != 0x98 && - ver != 0x9a && ver != 0xa7) + ver != 0x9a && ver != 0xa7 && ver != 0x7d) return; if (risky_device(dev))