From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95FF36FB1; Tue, 5 Dec 2023 03:37:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="Y3AC904V" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14634C433C7; Tue, 5 Dec 2023 03:37:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1701747449; bh=rzNAc5jMsHSwdW++0/Y71amW6UhMkHqcWSv4PHhmVy0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y3AC904VX1bLi/vi5mK3xTIc242EQgy3PHeYtK155UFFvbE3mTAUD2DF766duJ/iG +6Fn8+686VZudy7J9ZYzbAQLb+wx1xkyExP2Y6MnIHVdAWeNNld0cbNyohrglY3QNd L3pRH+YjMbPO8i/xCrEDLe60jH+YcDQZaVzS9LQk= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, "Abdul Halim, Mohd Syazwan" , Lu Baolu , Joerg Roedel , Abdul, Halim Subject: [PATCH 5.10 080/135] iommu/vt-d: Add MTL to quirk list to skip TE disabling Date: Tue, 5 Dec 2023 12:16:41 +0900 Message-ID: <20231205031535.539830151@linuxfoundation.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231205031530.557782248@linuxfoundation.org> References: <20231205031530.557782248@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Abdul Halim, Mohd Syazwan commit 85b80fdffa867d75dfb9084a839e7949e29064e8 upstream. The VT-d spec requires (10.4.4 Global Command Register, TE field) that: Hardware implementations supporting DMA draining must drain any in-flight DMA read/write requests queued within the Root-Complex before switching address translation on or off and reflecting the status of the command through the TES field in the Global Status register. Unfortunately, some integrated graphic devices fail to do so after some kind of power state transition. As the result, the system might stuck in iommu_disable_translation(), waiting for the completion of TE transition. Add MTL to the quirk list for those devices and skips TE disabling if the qurik hits. Fixes: b1012ca8dc4f ("iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu") Cc: stable@vger.kernel.org Signed-off-by: Abdul Halim, Mohd Syazwan Signed-off-by: Lu Baolu Link: https://lore.kernel.org/r/20231116022324.30120-1-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel Signed-off-by: Greg Kroah-Hartman --- drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -6325,7 +6325,7 @@ static void quirk_igfx_skip_te_disable(s ver = (dev->device >> 8) & 0xff; if (ver != 0x45 && ver != 0x46 && ver != 0x4c && ver != 0x4e && ver != 0x8a && ver != 0x98 && - ver != 0x9a && ver != 0xa7) + ver != 0x9a && ver != 0xa7 && ver != 0x7d) return; if (risky_device(dev))