From: Bjorn Helgaas <helgaas@kernel.org>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-pci@vger.kernel.org, lpieralisi@kernel.org, kw@linux.com,
robh@kernel.org, linux-kernel@vger.kernel.org,
chenhuacai@kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v6] pci: loongson: Workaround MIPS firmware MRRS settings
Date: Fri, 8 Dec 2023 16:16:18 -0600 [thread overview]
Message-ID: <20231208221618.GA834006@bhelgaas> (raw)
In-Reply-To: <20231201115028.84351-1-jiaxun.yang@flygoat.com>
On Fri, Dec 01, 2023 at 11:50:28AM +0000, Jiaxun Yang wrote:
> ...
> + { PCI_VDEVICE(LOONGSON, DEV_LS2K_PCIE_PORT0) },
> + { PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT0) },
> + { PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT1) },
> + { PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT2) },
> + { PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT3) },
> + { PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT4) },
> + { PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT5) },
> + { PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT6) },
P.S. I notice most of these Device IDs are not in the lspci database
at https://admin.pci-ids.ucw.cz/read/PC/0014. It's easy to add them;
there's a link at the bottom of that page.
Some, e.g., 0x7a09 (DEV_LS7A_PCIE_PORT0), are described as "PCI-to-PCI
Bridge". I had the impression these were Root Ports. If so, the
description could be more specific.
Bjorn
prev parent reply other threads:[~2023-12-08 22:16 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-01 11:50 [PATCH v6] pci: loongson: Workaround MIPS firmware MRRS settings Jiaxun Yang
2023-12-02 3:01 ` Huacai Chen
2023-12-08 16:50 ` Bjorn Helgaas
2023-12-08 22:16 ` Bjorn Helgaas [this message]
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