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From: <gregkh@linuxfoundation.org>
To: niklas.cassel@wdc.com,kishon@kernel.org,kwilczynski@kernel.org,manivannan.sadhasivam@linaro.org
Cc: <stable@vger.kernel.org>
Subject: FAILED: patch "[PATCH] PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment" failed to apply to 5.10-stable tree
Date: Mon, 22 Jan 2024 12:15:09 -0800	[thread overview]
Message-ID: <2024012208-vest-commence-5d45@gregkh> (raw)


The patch below does not apply to the 5.10-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.10.y
git checkout FETCH_HEAD
git cherry-pick -x 2217fffcd63f86776c985d42e76daa43a56abdf1
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<stable@vger.kernel.org>' --in-reply-to '2024012208-vest-commence-5d45@gregkh' --subject-prefix 'PATCH 5.10.y' HEAD^..

Possible dependencies:

2217fffcd63f ("PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support")
53fd3cbe5e9d ("PCI: endpoint: Add virtual function number in pci_epc ops")
1cf362e907f3 ("PCI: endpoint: Add support to add virtual function in endpoint core")
347269c113f1 ("PCI: Fix kernel-doc formatting")
6613bc2301ba ("PCI: endpoint: Fix NULL pointer dereference for ->get_features()")
8b821cf76150 ("PCI: endpoint: Add EP function driver to provide NTB functionality")
dbcc542f3608 ("PCI: cadence: Implement ->msi_map_irq() ops")
38ad827e3bc0 ("PCI: endpoint: Allow user to create sub-directory of 'EPF Device' directory")
256ae475201b ("PCI: endpoint: Add pci_epf_ops to expose function-specific attrs")
87d5972e476f ("PCI: endpoint: Add pci_epc_ops to map MSI IRQ")
63840ff53223 ("PCI: endpoint: Add support to associate secondary EPC with EPF")
0e27aeccfa3d ("PCI: endpoint: Make *_free_bar() to return error codes on failure")
fa8fef0e104a ("PCI: endpoint: Add helper API to get the 'next' unreserved BAR")
959a48d0eac0 ("PCI: endpoint: Make *_get_first_free_bar() take into account 64 bit BAR")

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 2217fffcd63f86776c985d42e76daa43a56abdf1 Mon Sep 17 00:00:00 2001
From: Niklas Cassel <niklas.cassel@wdc.com>
Date: Tue, 28 Nov 2023 14:22:30 +0100
Subject: [PATCH] PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment
 support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Commit 6f5e193bfb55 ("PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get
correct MSI-X table address") modified dw_pcie_ep_raise_msix_irq() to
support iATUs which require a specific alignment.

However, this support cannot have been properly tested.

The whole point is for the iATU to map an address that is aligned,
using dw_pcie_ep_map_addr(), and then let the writel() write to
ep->msi_mem + aligned_offset.

Thus, modify the address that is mapped such that it is aligned.
With this change, dw_pcie_ep_raise_msix_irq() matches the logic in
dw_pcie_ep_raise_msi_irq().

Link: https://lore.kernel.org/linux-pci/20231128132231.2221614-1-nks@flawful.org
Fixes: 6f5e193bfb55 ("PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: stable@vger.kernel.org # 5.7
Cc: Kishon Vijay Abraham I <kishon@kernel.org>

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index f6207989fc6a..bc94d7f39535 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -615,6 +615,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
 	}
 
 	aligned_offset = msg_addr & (epc->mem->window.page_size - 1);
+	msg_addr &= ~aligned_offset;
 	ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
 				  epc->mem->window.page_size);
 	if (ret)


                 reply	other threads:[~2024-01-22 20:15 UTC|newest]

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