From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDF5C13A26F; Tue, 27 Feb 2024 14:08:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709042890; cv=none; b=p6Ps8fCXmR7fyj0reSGZtwnP4MuhMSWHyFKYY2sDg7u2IJwcq0OiQeGOFMuMQVefQv8L/FYJ5qKUTl3VccShGAxueaBkKHtrWzZa8LlKYifWGV94a+Ez2mvkYLN1iYY3a9yt2lhWgoGIAGOcG0hNemdLNxyp8WeyzusFUnObhcM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709042890; c=relaxed/simple; bh=u10gPLaAvaECjyLIXL0mbOicjNc0j8uc/JdK2LF+/Ec=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qtTdFIBUD2uMwyvWXgkc+CP3OZdY4Y92Xw+AP9H7soMHPhJavgmYeVCfqV8BKxn/j7pBZlc4UNka+9AKWUM50RuZV0HyP5egEr/wJ/iYRFNir2d5hr3ZARqbFORYR7FoEaIpwUQJeeYFYQAN4Qot3AsBIsJZGRfx6D7OVqP3yzI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=ZLXFsJi8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="ZLXFsJi8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6ECFDC433C7; Tue, 27 Feb 2024 14:08:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1709042889; bh=u10gPLaAvaECjyLIXL0mbOicjNc0j8uc/JdK2LF+/Ec=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZLXFsJi8Z07e/m8dUoJup64Wg7Ev+MiIyl2aPFc0bIRtuYy17f6ZInT1qmEr0DlEv CjSyn6Al95p9RzaN3j/viJkvNZK2V7+6E+xgH4IkkJfZtLRYrMItTUDXRHGTHpmt/m RInzKaiXfg3v8Ocpi3ujfAnn7aaD3CHn9GdsmJaY= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Stephen Boyd , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Sasha Levin Subject: [PATCH 5.15 120/245] clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC Date: Tue, 27 Feb 2024 14:25:08 +0100 Message-ID: <20240227131619.126539770@linuxfoundation.org> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240227131615.098467438@linuxfoundation.org> References: <20240227131615.098467438@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Dmitry Baryshkov [ Upstream commit 658c82caffa042b351f5a1b6325819297a951a04 ] The gdsc_init() function will rewrite the CLK_DIS_WAIT field while registering the GDSC (writing the value 0x2 by default). This will override the setting done in the driver's probe function. Set cx_gdsc.clk_dis_wait_val to 8 to follow the intention of the probe function. Fixes: 745ff069a49c ("clk: qcom: Add graphics clock controller driver for SC7180") Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230201172305.993146-1-dmitry.baryshkov@linaro.org Signed-off-by: Sasha Levin --- drivers/clk/qcom/gpucc-sc7180.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/clk/qcom/gpucc-sc7180.c b/drivers/clk/qcom/gpucc-sc7180.c index d738251cba17d..6839b4b71a2f4 100644 --- a/drivers/clk/qcom/gpucc-sc7180.c +++ b/drivers/clk/qcom/gpucc-sc7180.c @@ -21,8 +21,6 @@ #define CX_GMU_CBCR_SLEEP_SHIFT 4 #define CX_GMU_CBCR_WAKE_MASK 0xF #define CX_GMU_CBCR_WAKE_SHIFT 8 -#define CLK_DIS_WAIT_SHIFT 12 -#define CLK_DIS_WAIT_MASK (0xf << CLK_DIS_WAIT_SHIFT) enum { P_BI_TCXO, @@ -160,6 +158,7 @@ static struct clk_branch gpu_cc_cxo_clk = { static struct gdsc cx_gdsc = { .gdscr = 0x106c, .gds_hw_ctrl = 0x1540, + .clk_dis_wait_val = 8, .pd = { .name = "cx_gdsc", }, @@ -242,10 +241,6 @@ static int gpu_cc_sc7180_probe(struct platform_device *pdev) value = 0xF << CX_GMU_CBCR_WAKE_SHIFT | 0xF << CX_GMU_CBCR_SLEEP_SHIFT; regmap_update_bits(regmap, 0x1098, mask, value); - /* Configure clk_dis_wait for gpu_cx_gdsc */ - regmap_update_bits(regmap, 0x106c, CLK_DIS_WAIT_MASK, - 8 << CLK_DIS_WAIT_SHIFT); - return qcom_cc_really_probe(pdev, &gpu_cc_sc7180_desc, regmap); } -- 2.43.0