From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC28A3D961; Mon, 1 Apr 2024 16:16:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711988166; cv=none; b=uL6AYRAIEK7pE/ZnpbadrS58v50yG9nHOkiu716gRL3Z+KPYd/GwtRaBlSGZpkVUKus3J0ALWAAAx5eUzltAO1T0suNJSlegEIuRZ2CrGEu29Jqg0TGndJF0lamA+G76agVDhmg5t0Vx/koJYQWDFcUz+0ZEbGSRbHitCnApUkM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711988166; c=relaxed/simple; bh=MDEtn/BSbtRxMPQuScexR5XVqLH3JMS30sFMLszULsU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=elAKQE0MxCOlTUhC+carsmcQUjW27Ncdjfc4Oq7l1+pYkYsutqfXTqc2lXiJJCaJe8F9Pv4TEkzpSvMa5qNs0iv6eycfGydxxVZJNM50PICOHUmGRRnxovQseNZe7nvSzc43XjhRfqaa1TWlBRLS6T67669cLYxxV+Oj2465er0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=t8xHUc1P; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="t8xHUc1P" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4A184C43390; Mon, 1 Apr 2024 16:16:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1711988165; bh=MDEtn/BSbtRxMPQuScexR5XVqLH3JMS30sFMLszULsU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=t8xHUc1PExOOJDbLs5BM9VeodIta2kkWRDGyCD1W9pQ1rkktW3eHiQvVod3/677BV qw8qajf3URnnuP2LefSYTA+rh/PC9eLlHeBXub3/s4n7wzUzTcw6Blllo/eIjdaVlq ip9yI+sBTMhUObkl2nA27iRViofm5sxBE4WnfVuo= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Jan-Benedict Glaw , Michael Ellerman , Sasha Levin Subject: [PATCH 6.7 076/432] powerpc/fsl: Fix mfpmr build errors with newer binutils Date: Mon, 1 Apr 2024 17:41:03 +0200 Message-ID: <20240401152555.390448360@linuxfoundation.org> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240401152553.125349965@linuxfoundation.org> References: <20240401152553.125349965@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.7-stable review patch. If anyone has any objections, please let me know. ------------------ From: Michael Ellerman [ Upstream commit 5f491356b7149564ab22323ccce79c8d595bfd0c ] Binutils 2.38 complains about the use of mfpmr when building ppc6xx_defconfig: CC arch/powerpc/kernel/pmc.o {standard input}: Assembler messages: {standard input}:45: Error: unrecognized opcode: `mfpmr' {standard input}:56: Error: unrecognized opcode: `mtpmr' This is because by default the kernel is built with -mcpu=powerpc, and the mt/mfpmr instructions are not defined. It can be avoided by enabling CONFIG_E300C3_CPU, but just adding that to the defconfig will leave open the possibility of randconfig failures. So add machine directives around the mt/mfpmr instructions to tell binutils how to assemble them. Cc: stable@vger.kernel.org Reported-by: Jan-Benedict Glaw Signed-off-by: Michael Ellerman Link: https://msgid.link/20240229122521.762431-3-mpe@ellerman.id.au Signed-off-by: Sasha Levin --- arch/powerpc/include/asm/reg_fsl_emb.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h index a21f529c43d96..8359c06d92d9f 100644 --- a/arch/powerpc/include/asm/reg_fsl_emb.h +++ b/arch/powerpc/include/asm/reg_fsl_emb.h @@ -12,9 +12,16 @@ #ifndef __ASSEMBLY__ /* Performance Monitor Registers */ #define mfpmr(rn) ({unsigned int rval; \ - asm volatile("mfpmr %0," __stringify(rn) \ + asm volatile(".machine push; " \ + ".machine e300; " \ + "mfpmr %0," __stringify(rn) ";" \ + ".machine pop; " \ : "=r" (rval)); rval;}) -#define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v)) +#define mtpmr(rn, v) asm volatile(".machine push; " \ + ".machine e300; " \ + "mtpmr " __stringify(rn) ",%0; " \ + ".machine pop; " \ + : : "r" (v)) #endif /* __ASSEMBLY__ */ /* Freescale Book E Performance Monitor APU Registers */ -- 2.43.0