From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85E5E145FF0; Thu, 11 Apr 2024 10:20:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712830853; cv=none; b=QRwee6W/IbmoYG4TWUIdQ4o7FKzQ19aeKfBYIrAYF9NbOWpjriilvwOvH+vSuxNydx/WK+llKv66NlFftZ220+uw6B5B0YkpYI9sUIbhXOmbT8rTr24voftZcLRT7d2DWKdj0xrzcWJJXvGrIsCOXPJhN/Nqfme9hae8P4Cb0tA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712830853; c=relaxed/simple; bh=N9/FvBQGj2cIws6/CAIGv/4suDB1c7ePm8FbhZ2huL4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JSafdnBQUW8CX68ykDrjP/UpPMxyPE2goYHFXwH0LCBHcbAjqN3FrBnyJC1TuvqpWr39smJeaKVjdTnE597G9YWLruQXFe2LumRfbKJoDRP/aImvQOI2ri8ogAAQl+KmNkm7PQCtPdflUlKixxtfwFOcFbdWGCbr9+iWIOHybAg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=nKMkLvg0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="nKMkLvg0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0DC9DC433C7; Thu, 11 Apr 2024 10:20:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1712830853; bh=N9/FvBQGj2cIws6/CAIGv/4suDB1c7ePm8FbhZ2huL4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nKMkLvg0PeGbepvzn1bRrYwGHqCZFILia3i9kPYVPW1TqPc+2mI/BSuCGfT6sRAxo BGYiXsUuSiOeKQOMc0e4MKv4KskgbxTMEQ4xzsyJYKyRYnQiEd91w5TC75mtbJbsEh mt5eINMR7bhUOBe4U0UNGCGE70LR0dxdCiKlTixo= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Kevin Tian , Eric Auger , Alex Williamson Subject: [PATCH 5.4 139/215] vfio/pci: Disable auto-enable of exclusive INTx IRQ Date: Thu, 11 Apr 2024 11:55:48 +0200 Message-ID: <20240411095429.072346154@linuxfoundation.org> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240411095424.875421572@linuxfoundation.org> References: <20240411095424.875421572@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.4-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alex Williamson [ Upstream commit fe9a7082684eb059b925c535682e68c34d487d43 ] Currently for devices requiring masking at the irqchip for INTx, ie. devices without DisINTx support, the IRQ is enabled in request_irq() and subsequently disabled as necessary to align with the masked status flag. This presents a window where the interrupt could fire between these events, resulting in the IRQ incrementing the disable depth twice. This would be unrecoverable for a user since the masked flag prevents nested enables through vfio. Instead, invert the logic using IRQF_NO_AUTOEN such that exclusive INTx is never auto-enabled, then unmask as required. Cc: Fixes: 89e1f7d4c66d ("vfio: Add PCI device driver") Reviewed-by: Kevin Tian Reviewed-by: Eric Auger Link: https://lore.kernel.org/r/20240308230557.805580-2-alex.williamson@redhat.com Signed-off-by: Alex Williamson Signed-off-by: Greg Kroah-Hartman --- drivers/vfio/pci/vfio_pci_intrs.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -199,8 +199,15 @@ static int vfio_intx_set_signal(struct v vdev->ctx[0].trigger = trigger; + /* + * Devices without DisINTx support require an exclusive interrupt, + * IRQ masking is performed at the IRQ chip. The masked status is + * protected by vdev->irqlock. Setup the IRQ without auto-enable and + * unmask as necessary below under lock. DisINTx is unmodified by + * the IRQ configuration and may therefore use auto-enable. + */ if (!vdev->pci_2_3) - irqflags = 0; + irqflags = IRQF_NO_AUTOEN; ret = request_irq(pdev->irq, vfio_intx_handler, irqflags, vdev->ctx[0].name, vdev); @@ -211,13 +218,9 @@ static int vfio_intx_set_signal(struct v return ret; } - /* - * INTx disable will stick across the new irq setup, - * disable_irq won't. - */ spin_lock_irqsave(&vdev->irqlock, flags); - if (!vdev->pci_2_3 && vdev->ctx[0].masked) - disable_irq_nosync(pdev->irq); + if (!vdev->pci_2_3 && !vdev->ctx[0].masked) + enable_irq(pdev->irq); spin_unlock_irqrestore(&vdev->irqlock, flags); return 0;