From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 084C8168C4; Mon, 27 May 2024 19:25:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716837925; cv=none; b=C5kxpjatIJpPM0LoijWE3V3zclyXjKpqRXPymqKFTLm1Lp6Sp3eHdqs15f65WxviD1EgXb8LmWlIL1wwdoFDXt35XXFtqowFpjFWNKgSj4bQt2O0RdNlvFFOGMxbFgWis+9oW1Nl7lYc7g9YRvnDP+yHrUjT6Oj0RpPMD+NXMTg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716837925; c=relaxed/simple; bh=4bHhLa+ocrVtExppVff7202C2YcCfb+3QDNGx7Nb1yc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bYZGGgdzB93A1aXL7rMhQtcTAlF6J2SPbiCr/Te8aqpLGBMHb0Txq+JXMKG6f5OKUV2IMNfCECiBfhZrUwLbLq+p2kui7dCLrViI13MoFItvq2T3yrKygVB28eqaG+PBCzhDL3tsxPOaSBGwl/jdVgmCzimTMHagT+MWpyyeoGo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=dnFQMk+G; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="dnFQMk+G" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 912CAC2BBFC; Mon, 27 May 2024 19:25:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1716837924; bh=4bHhLa+ocrVtExppVff7202C2YcCfb+3QDNGx7Nb1yc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dnFQMk+GLvcy/BF54B3HeruQ4JdKzxl8XL6tPr7irl76+Q4dKK2GV69oDOtMgbQaR 2R+4b1axJTbx3JrV2ngfgaJAOVpLna+wROSF2x+Mpo3q4xYkzBn87l92LgQ3YBwaDf EDV3VVbZ51YySU+HjIeYKy5Q450PXOagHkJo8RNA= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Manivannan Sadhasivam , Can Guo , Andrew Halaney , "Martin K. Petersen" , Sasha Levin Subject: [PATCH 6.8 198/493] scsi: ufs: qcom: Perform read back after writing CGC enable Date: Mon, 27 May 2024 20:53:20 +0200 Message-ID: <20240527185636.823511333@linuxfoundation.org> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240527185626.546110716@linuxfoundation.org> References: <20240527185626.546110716@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.8-stable review patch. If anyone has any objections, please let me know. ------------------ From: Andrew Halaney [ Upstream commit d9488511b3ac7eb48a91bc5eded7027525525e03 ] Currently, the CGC enable bit is written and then an mb() is used to ensure that completes before continuing. mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here: https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678 Let's do that to ensure the bit hits the device. Because the mb()'s purpose wasn't to add extra ordering (on top of the ordering guaranteed by writel()/readl()), it can safely be removed. Reviewed-by: Manivannan Sadhasivam Reviewed-by: Can Guo Fixes: 81c0fc51b7a7 ("ufs-qcom: add support for Qualcomm Technologies Inc platforms") Signed-off-by: Andrew Halaney Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-5-181252004586@redhat.com Signed-off-by: Martin K. Petersen Signed-off-by: Sasha Levin --- drivers/ufs/host/ufs-qcom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index cef410f31f449..e5a4bf1c553bb 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -412,7 +412,7 @@ static void ufs_qcom_enable_hw_clk_gating(struct ufs_hba *hba) REG_UFS_CFG2); /* Ensure that HW clock gating is enabled before next operations */ - mb(); + ufshcd_readl(hba, REG_UFS_CFG2); } static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba, -- 2.43.0