From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 098111BE22F; Thu, 6 Jun 2024 14:18:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717683530; cv=none; b=qixZBHdun8DUIAMKdFNKFIcTsg8dPR5TbElqzieDK6lZT9fofF+He/YvuR+zU0AfketceuuhF/IMoit6eFaa+pZyvmC2zy27wHPOTFqMJx2cWOAwui8vtnLfHP/ALIdKT5TQMGbabb4Lu6l3/ueWh/qU17pA8MYxql5a/ozEPrw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717683530; c=relaxed/simple; bh=2BXcnOhqc8fZIlPCcq4YuN+to1ORkqTsTVaIXwQ6kuQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lZkAEf2afZIRYEJanOxXgeYzUXpx+JTGCZcqselkzo8T/CaVGqKvtHCEedp95f3/9jfce/lruZwF/ebDgm7o0Lq/wB9res8Vrxa9axhSis3OPLzkxETb/kKprIgL3qG4f4sp7uVilzjVOdcJz8IYSYeUDyahN5CPzlc78DFzq2k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=0gDRn+9/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="0gDRn+9/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DAE25C2BD10; Thu, 6 Jun 2024 14:18:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1717683529; bh=2BXcnOhqc8fZIlPCcq4YuN+to1ORkqTsTVaIXwQ6kuQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=0gDRn+9/sFwclV0CruvTVyFDnzt6t1QUWCSq69/FuFCNNgHLDEvdeg6LYJ8VpykTT OR4PiTAwiooV1RCoSYfswyAAQMzgu9aNakA7xKHF2Xehz0DPW6D9r2mxzQhhLFYFJ+ ywHUF0JMCshjma013Z4mZA4QkK7TeYstvPB8kCwM= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Alexandre Ghiti , Samuel Holland , Palmer Dabbelt , Sasha Levin Subject: [PATCH 6.6 470/744] riscv: Flush the instruction cache during SMP bringup Date: Thu, 6 Jun 2024 16:02:22 +0200 Message-ID: <20240606131747.541178576@linuxfoundation.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240606131732.440653204@linuxfoundation.org> References: <20240606131732.440653204@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Samuel Holland [ Upstream commit 58661a30f1bcc748475ffd9be6d2fc9e4e6be679 ] Instruction cache flush IPIs are sent only to CPUs in cpu_online_mask, so they will not target a CPU until it calls set_cpu_online() earlier in smp_callin(). As a result, if instruction memory is modified between the CPU coming out of reset and that point, then its instruction cache may contain stale data. Therefore, the instruction cache must be flushed after the set_cpu_online() synchronization point. Fixes: 08f051eda33b ("RISC-V: Flush I$ when making a dirty page executable") Reviewed-by: Alexandre Ghiti Signed-off-by: Samuel Holland Link: https://lore.kernel.org/r/20240327045035.368512-2-samuel.holland@sifive.com Signed-off-by: Palmer Dabbelt Signed-off-by: Sasha Levin --- arch/riscv/kernel/smpboot.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index d1b0a6fc3adfc..b30aeed26b717 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -26,7 +26,7 @@ #include #include -#include +#include #include #include #include @@ -258,9 +258,10 @@ asmlinkage __visible void smp_callin(void) riscv_user_isa_enable(); /* - * Remote TLB flushes are ignored while the CPU is offline, so emit - * a local TLB flush right now just in case. + * Remote cache and TLB flushes are ignored while the CPU is offline, + * so flush them both right now just in case. */ + local_flush_icache_all(); local_flush_tlb_all(); complete(&cpu_running); /* -- 2.43.0