FAILED: patch "[PATCH] drm/amdgpu: Reset dGPU if suspend got aborted" failed to apply to 5.4-stable tree

FAILED: patch "[PATCH] drm/amdgpu: Reset dGPU if suspend got aborted" failed to apply to 5.4-stable tree

[gregkh]

The patch below does not apply to the 5.4-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.4.y
git checkout FETCH_HEAD
git cherry-pick -x df3c7dc5c58b1f85033d2cd9a121b27844700ca2
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<stable@vger.kernel.org>' --in-reply-to '2024061935-mountable-spore-a796@gregkh' --subject-prefix 'PATCH 5.4.y' HEAD^..

Possible dependencies:

df3c7dc5c58b ("drm/amdgpu: Reset dGPU if suspend got aborted")
71199aa47bbc ("drm/amdgpu: add soc21 common ip block v2")
0d055f09e121 ("drm/amdgpu: drop navi reg init functions")
bf99b9b03265 ("drm/amdgpu: drop nv_set_ip_blocks()")
f76f795a8ffa ("drm/amdgpu: move headless sku check into harvest function")
3f68c01be9a2 ("drm/amd/display: add cyan_skillfish display support")
59066d0083d2 ("drm/amdgpu: handle VCN instances when harvesting (v2)")
733ee71ae0d0 ("drm/amdgpu: replace dce_virtual with amdgpu_vkms (v3)")
fd922f7a0e90 ("drm/amdgpu: cleanup dce_virtual")
84ec374bd580 ("drm/amdgpu: create amdgpu_vkms (v4)")
641df0990487 ("drm/amdgpu: enable SMU for cyan_skilfish")
1c7916af55a7 ("drm/amdgpu: enable psp v11.0.8 for cyan_skillfish")
338b3cf0b9f8 ("drm/amdgpu: add nbio support for cyan_skillfish")
f36fb5a0e361 ("drm/amdgpu: set ip blocks for cyan_skillfish")
708391977be5 ("drm/amdgpu: dynamic initialize ip offset for cyan_skillfish")
46ddb8965882 ("drm/amd/display: implement workaround for riommu related hang")
9604b74bff62 ("drm/amdgpu: Correct the irq numbers for virtual crtc")
8fe44c080a53 ("drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN")
30adeee52d1e ("drm/amd/display: Enforce DPCD Address ranges")
c5bc8c1bd4c7 ("drm/amd/display: Read LTTPR caps first on bootup")

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From df3c7dc5c58b1f85033d2cd9a121b27844700ca2 Mon Sep 17 00:00:00 2001
From: Lijo Lazar <lijo.lazar@amd.com>
Date: Wed, 14 Feb 2024 17:55:54 +0530
Subject: [PATCH] drm/amdgpu: Reset dGPU if suspend got aborted

For SOC21 ASICs, there is an issue in re-enabling PM features if a
suspend got aborted. In such cases, reset the device during resume
phase. This is a workaround till a proper solution is finalized.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 8526282f4da1..abe319b0f063 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -867,10 +867,35 @@ static int soc21_common_suspend(void *handle)
 	return soc21_common_hw_fini(adev);
 }
 
+static bool soc21_need_reset_on_resume(struct amdgpu_device *adev)
+{
+	u32 sol_reg1, sol_reg2;
+
+	/* Will reset for the following suspend abort cases.
+	 * 1) Only reset dGPU side.
+	 * 2) S3 suspend got aborted and TOS is active.
+	 */
+	if (!(adev->flags & AMD_IS_APU) && adev->in_s3 &&
+	    !adev->suspend_complete) {
+		sol_reg1 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);
+		msleep(100);
+		sol_reg2 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);
+
+		return (sol_reg1 != sol_reg2);
+	}
+
+	return false;
+}
+
 static int soc21_common_resume(void *handle)
 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+	if (soc21_need_reset_on_resume(adev)) {
+		dev_info(adev->dev, "S3 suspend aborted, resetting...");
+		soc21_asic_reset(adev);
+	}
+
 	return soc21_common_hw_init(adev);
 }