From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 989C219AA5F; Thu, 25 Jul 2024 14:43:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721918608; cv=none; b=j4+d51RcDE0bypPnbtFXezVbQc7qB2TqJUmv5Jkry4clCl0Y6fjP3jIelwiMqxmcc0lkQbvFmHot4y0Csf13SXjS90JXC0q366vsJI5ec2GU/rqG9JjaDjhDjgD9YQPEnPleKOi4Ah/FazljvU9gh7XHtl9Ve1CJRlB33QTeL24= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721918608; c=relaxed/simple; bh=uLs88oG3mamLsZPjTTP+hmBbWIOPyhW/KqEJ0qP2bag=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Nu6Q4kgy/Y1VyhzyLtLI4u0O9dwtbzlG/QY2jpUt9xSXaV2dXx2PY3kkpSWxQE5IdO5hpgi9jW3VtkOP1Ugv55hZJGC+o9Ty12gUGhvZ3MMMVu+Q5Z2s9zFHn+Uv5PnBR9C1uzMC/om7T9VSP2xpnmxM8jdswioLAZ2or6ukQVs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=b3XQ66zy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="b3XQ66zy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CF7F6C116B1; Thu, 25 Jul 2024 14:43:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1721918608; bh=uLs88oG3mamLsZPjTTP+hmBbWIOPyhW/KqEJ0qP2bag=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=b3XQ66zyPVqoBt0thTP/BJNSMPdgRCYJl4N8oW+6UZDmt3iNxVHtqzRH3/bI/toZt 5lY1Ddb4jXoogVj9o/ROibHFWxHe6GHeLixrVLKZJk1B3rvR2mo7XB1mWBBMhv6gQM f0rVMwwwtTplk0ghEZGInMbLv0Mls0O5odMGUJwU= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Masahiro Yamada , Ard Biesheuvel , "Russell King (Oracle)" , John Stultz Subject: [PATCH 5.4 36/43] ARM: 9324/1: fix get_user() broken with veneer Date: Thu, 25 Jul 2024 16:36:59 +0200 Message-ID: <20240725142731.836261154@linuxfoundation.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240725142730.471190017@linuxfoundation.org> References: <20240725142730.471190017@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.4-stable review patch. If anyone has any objections, please let me know. ------------------ From: Masahiro Yamada commit 24d3ba0a7b44c1617c27f5045eecc4f34752ab03 upstream. The 32-bit ARM kernel stops working if the kernel grows to the point where veneers for __get_user_* are created. AAPCS32 [1] states, "Register r12 (IP) may be used by a linker as a scratch register between a routine and any subroutine it calls. It can also be used within a routine to hold intermediate values between subroutine calls." However, bl instructions buried within the inline asm are unpredictable for compilers; hence, "ip" must be added to the clobber list. This becomes critical when veneers for __get_user_* are created because veneers use the ip register since commit 02e541db0540 ("ARM: 8323/1: force linker to use PIC veneers"). [1]: https://github.com/ARM-software/abi-aa/blob/2023Q1/aapcs32/aapcs32.rst Signed-off-by: Masahiro Yamada Reviewed-by: Ard Biesheuvel Signed-off-by: Russell King (Oracle) Cc: John Stultz Signed-off-by: Greg Kroah-Hartman --- arch/arm/include/asm/uaccess.h | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h @@ -143,16 +143,6 @@ extern int __get_user_64t_1(void *); extern int __get_user_64t_2(void *); extern int __get_user_64t_4(void *); -#define __GUP_CLOBBER_1 "lr", "cc" -#ifdef CONFIG_CPU_USE_DOMAINS -#define __GUP_CLOBBER_2 "ip", "lr", "cc" -#else -#define __GUP_CLOBBER_2 "lr", "cc" -#endif -#define __GUP_CLOBBER_4 "lr", "cc" -#define __GUP_CLOBBER_32t_8 "lr", "cc" -#define __GUP_CLOBBER_8 "lr", "cc" - #define __get_user_x(__r2, __p, __e, __l, __s) \ __asm__ __volatile__ ( \ __asmeq("%0", "r0") __asmeq("%1", "r2") \ @@ -160,7 +150,7 @@ extern int __get_user_64t_4(void *); "bl __get_user_" #__s \ : "=&r" (__e), "=r" (__r2) \ : "0" (__p), "r" (__l) \ - : __GUP_CLOBBER_##__s) + : "ip", "lr", "cc") /* narrowing a double-word get into a single 32bit word register: */ #ifdef __ARMEB__ @@ -182,7 +172,7 @@ extern int __get_user_64t_4(void *); "bl __get_user_64t_" #__s \ : "=&r" (__e), "=r" (__r2) \ : "0" (__p), "r" (__l) \ - : __GUP_CLOBBER_##__s) + : "ip", "lr", "cc") #else #define __get_user_x_64t __get_user_x #endif