* [PATCH v5.10.y v2] mtd: spinand: macronix: Add support for serial NAND flash
@ 2024-06-25 7:09 Cheng Ming Lin
0 siblings, 0 replies; 6+ messages in thread
From: Cheng Ming Lin @ 2024-06-25 7:09 UTC (permalink / raw)
To: miquel.raynal, dwmw2, computersforpeace, marek.vasut, vigneshr,
linux-mtd, linux-kernel
Cc: richard, alvinzhou, leoyu, Cheng Ming Lin, stable, Jaime Liao
From: Cheng Ming Lin <chengminglin@mxic.com.tw>
[ Upstream commit c374839f9b4475173e536d1eaddff45cb481dbdf ]
Macronix NAND Flash devices are available in different configurations
and densities.
MX"35" means SPI NAND
MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
MX35LF"2G" , 2G means 2Gbits
MX35LF2G"E4"/"24"/"14",
E4 means internal ECC and Quad I/O(x4)
24 means 8-bit ecc requirement and Quad I/O(x4)
14 means 4-bit ecc requirement and Quad I/O(x4)
MX35LF2G14AC is 3V 2Gbit serial NAND flash device
(without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND flash device
(without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
NAND flash device (without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
Validated via normal(default) and QUAD mode by read, erase, read back,
on Xilinx Zynq PicoZed FPGA board which included Macronix
SPI Host(drivers/spi/spi-mxic.c).
Cc: stable@vger.kernel.org # 5.10.y
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1621475108-22523-1-git-send-email-jaimeliao@mxic.com.tw
---
drivers/mtd/nand/spi/macronix.c | 110 ++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 8bd3f6bf9b10..e42524687b5c 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -139,6 +139,116 @@ static const struct spinand_info macronix_spinand_table[] = {
0,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35LF2G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x20),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF4G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb5),
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF4GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb7),
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa0),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa4),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa6),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2GE4AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa2),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x90),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x94),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x96),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1GE4AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x92),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
SPINAND_INFO("MX31LF1GE4BC",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v5.10.y v2] mtd: spinand: macronix: Add support for serial NAND flash
@ 2024-07-17 9:01 Cheng Ming Lin
2024-07-23 13:36 ` Greg KH
0 siblings, 1 reply; 6+ messages in thread
From: Cheng Ming Lin @ 2024-07-17 9:01 UTC (permalink / raw)
To: kunchichiang; +Cc: Cheng Ming Lin, stable, Jaime Liao, Miquel Raynal
From: Cheng Ming Lin <chengminglin@mxic.com.tw>
[ Upstream commit c374839f9b4475173e536d1eaddff45cb481dbdf ]
Macronix NAND Flash devices are available in different configurations
and densities.
MX"35" means SPI NAND
MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
MX35LF"2G" , 2G means 2Gbits
MX35LF2G"E4"/"24"/"14",
E4 means internal ECC and Quad I/O(x4)
24 means 8-bit ecc requirement and Quad I/O(x4)
14 means 4-bit ecc requirement and Quad I/O(x4)
MX35LF2G14AC is 3V 2Gbit serial NAND flash device
(without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND flash device
(without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
NAND flash device (without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
Validated via normal(default) and QUAD mode by read, erase, read back,
on Xilinx Zynq PicoZed FPGA board which included Macronix
SPI Host(drivers/spi/spi-mxic.c).
Cc: stable@vger.kernel.org # 5.10.y
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1621475108-22523-1-git-send-email-jaimeliao@mxic.com.tw
---
drivers/mtd/nand/spi/macronix.c | 110 ++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 8bd3f6bf9b10..e42524687b5c 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -139,6 +139,116 @@ static const struct spinand_info macronix_spinand_table[] = {
0,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35LF2G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x20),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF4G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb5),
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF4GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb7),
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa0),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa4),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa6),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2GE4AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa2),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x90),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x94),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x96),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1GE4AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x92),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
SPINAND_INFO("MX31LF1GE4BC",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v5.10.y v2] mtd: spinand: macronix: Add support for serial NAND flash
2024-07-17 9:01 [PATCH v5.10.y v2] mtd: spinand: macronix: Add support for serial NAND flash Cheng Ming Lin
@ 2024-07-23 13:36 ` Greg KH
2024-07-26 1:15 ` Cheng Ming Lin
0 siblings, 1 reply; 6+ messages in thread
From: Greg KH @ 2024-07-23 13:36 UTC (permalink / raw)
To: Cheng Ming Lin
Cc: kunchichiang, Cheng Ming Lin, stable, Jaime Liao, Miquel Raynal
On Wed, Jul 17, 2024 at 05:01:26PM +0800, Cheng Ming Lin wrote:
> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>
> [ Upstream commit c374839f9b4475173e536d1eaddff45cb481dbdf ]
>
> Macronix NAND Flash devices are available in different configurations
> and densities.
>
> MX"35" means SPI NAND
> MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> MX35LF"2G" , 2G means 2Gbits
> MX35LF2G"E4"/"24"/"14",
> E4 means internal ECC and Quad I/O(x4)
> 24 means 8-bit ecc requirement and Quad I/O(x4)
> 14 means 4-bit ecc requirement and Quad I/O(x4)
>
> MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
>
> MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND flash device
> (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
>
> MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
> NAND flash device with 8-bit on-die ECC
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
>
> MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> NAND flash device with 8-bit on-die ECC
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
>
> MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> NAND flash device (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
>
> Validated via normal(default) and QUAD mode by read, erase, read back,
> on Xilinx Zynq PicoZed FPGA board which included Macronix
> SPI Host(drivers/spi/spi-mxic.c).
>
> Cc: stable@vger.kernel.org # 5.10.y
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> Link: https://lore.kernel.org/linux-mtd/1621475108-22523-1-git-send-email-jaimeliao@mxic.com.tw
> ---
> drivers/mtd/nand/spi/macronix.c | 110 ++++++++++++++++++++++++++++++++
> 1 file changed, 110 insertions(+)
This is already in the 5.10.y tree, why are you asking for it to be
applied again?
confused,
greg k-h
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v5.10.y v2] mtd: spinand: macronix: Add support for serial NAND flash
2024-07-23 13:36 ` Greg KH
@ 2024-07-26 1:15 ` Cheng Ming Lin
2024-07-26 5:23 ` Greg KH
0 siblings, 1 reply; 6+ messages in thread
From: Cheng Ming Lin @ 2024-07-26 1:15 UTC (permalink / raw)
To: Greg KH; +Cc: kunchichiang, Cheng Ming Lin, stable, Jaime Liao, Miquel Raynal
Hi,
Greg KH <greg@kroah.com> 於 2024年7月23日 週二 下午9:36寫道：
>
> On Wed, Jul 17, 2024 at 05:01:26PM +0800, Cheng Ming Lin wrote:
> > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> >
> > [ Upstream commit c374839f9b4475173e536d1eaddff45cb481dbdf ]
> >
> > Macronix NAND Flash devices are available in different configurations
> > and densities.
> >
> > MX"35" means SPI NAND
> > MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> > MX35LF"2G" , 2G means 2Gbits
> > MX35LF2G"E4"/"24"/"14",
> > E4 means internal ECC and Quad I/O(x4)
> > 24 means 8-bit ecc requirement and Quad I/O(x4)
> > 14 means 4-bit ecc requirement and Quad I/O(x4)
> >
> > MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> > (without on-die ECC)
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
> >
> > MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND flash device
> > (without on-die ECC)
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
> >
> > MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
> > NAND flash device with 8-bit on-die ECC
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
> >
> > MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> > NAND flash device with 8-bit on-die ECC
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
> >
> > MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> > NAND flash device (without on-die ECC)
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
> >
> > Validated via normal(default) and QUAD mode by read, erase, read back,
> > on Xilinx Zynq PicoZed FPGA board which included Macronix
> > SPI Host(drivers/spi/spi-mxic.c).
> >
> > Cc: stable@vger.kernel.org # 5.10.y
> > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > Link: https://lore.kernel.org/linux-mtd/1621475108-22523-1-git-send-email-jaimeliao@mxic.com.tw
> > ---
> > drivers/mtd/nand/spi/macronix.c | 110 ++++++++++++++++++++++++++++++++
> > 1 file changed, 110 insertions(+)
>
> This is already in the 5.10.y tree, why are you asking for it to be
> applied again?
>
I accidentally sent the wrong patch, which has already been applied to LTS.
I would like to inquire about the possibility of reverting this patch.
Thank you for your understanding,
and I apologize for any inconvenience caused.
> confused,
>
> greg k-h
Best regards,
Cheng-Ming Lin
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v5.10.y v2] mtd: spinand: macronix: Add support for serial NAND flash
2024-07-26 1:15 ` Cheng Ming Lin
@ 2024-07-26 5:23 ` Greg KH
2024-07-26 5:31 ` Cheng Ming Lin
0 siblings, 1 reply; 6+ messages in thread
From: Greg KH @ 2024-07-26 5:23 UTC (permalink / raw)
To: Cheng Ming Lin
Cc: kunchichiang, Cheng Ming Lin, stable, Jaime Liao, Miquel Raynal
On Fri, Jul 26, 2024 at 09:15:54AM +0800, Cheng Ming Lin wrote:
> Hi,
>
> Greg KH <greg@kroah.com> 於 2024年7月23日 週二 下午9:36寫道：
> >
> > On Wed, Jul 17, 2024 at 05:01:26PM +0800, Cheng Ming Lin wrote:
> > > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > >
> > > [ Upstream commit c374839f9b4475173e536d1eaddff45cb481dbdf ]
> > >
> > > Macronix NAND Flash devices are available in different configurations
> > > and densities.
> > >
> > > MX"35" means SPI NAND
> > > MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> > > MX35LF"2G" , 2G means 2Gbits
> > > MX35LF2G"E4"/"24"/"14",
> > > E4 means internal ECC and Quad I/O(x4)
> > > 24 means 8-bit ecc requirement and Quad I/O(x4)
> > > 14 means 4-bit ecc requirement and Quad I/O(x4)
> > >
> > > MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> > > (without on-die ECC)
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
> > >
> > > MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND flash device
> > > (without on-die ECC)
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
> > >
> > > MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
> > > NAND flash device with 8-bit on-die ECC
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
> > >
> > > MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> > > NAND flash device with 8-bit on-die ECC
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
> > >
> > > MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> > > NAND flash device (without on-die ECC)
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
> > >
> > > Validated via normal(default) and QUAD mode by read, erase, read back,
> > > on Xilinx Zynq PicoZed FPGA board which included Macronix
> > > SPI Host(drivers/spi/spi-mxic.c).
> > >
> > > Cc: stable@vger.kernel.org # 5.10.y
> > > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > > Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
> > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > Link: https://lore.kernel.org/linux-mtd/1621475108-22523-1-git-send-email-jaimeliao@mxic.com.tw
> > > ---
> > > drivers/mtd/nand/spi/macronix.c | 110 ++++++++++++++++++++++++++++++++
> > > 1 file changed, 110 insertions(+)
> >
> > This is already in the 5.10.y tree, why are you asking for it to be
> > applied again?
> >
>
> I accidentally sent the wrong patch, which has already been applied to LTS.
> I would like to inquire about the possibility of reverting this patch.
Revert what, the one that is in the tree already? If you need/want it
reverted, please submit a patch to do so along with the reasoning, like
any other change that is submitted here.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v5.10.y v2] mtd: spinand: macronix: Add support for serial NAND flash
2024-07-26 5:23 ` Greg KH
@ 2024-07-26 5:31 ` Cheng Ming Lin
0 siblings, 0 replies; 6+ messages in thread
From: Cheng Ming Lin @ 2024-07-26 5:31 UTC (permalink / raw)
To: Greg KH; +Cc: kunchichiang, Cheng Ming Lin, stable, Jaime Liao, Miquel Raynal
Hi,
Greg KH <greg@kroah.com> 於 2024年7月26日 週五 下午1:23寫道：
>
> On Fri, Jul 26, 2024 at 09:15:54AM +0800, Cheng Ming Lin wrote:
> > Hi,
> >
> > Greg KH <greg@kroah.com> 於 2024年7月23日 週二 下午9:36寫道：
> > >
> > > On Wed, Jul 17, 2024 at 05:01:26PM +0800, Cheng Ming Lin wrote:
> > > > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > > >
> > > > [ Upstream commit c374839f9b4475173e536d1eaddff45cb481dbdf ]
> > > >
> > > > Macronix NAND Flash devices are available in different configurations
> > > > and densities.
> > > >
> > > > MX"35" means SPI NAND
> > > > MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> > > > MX35LF"2G" , 2G means 2Gbits
> > > > MX35LF2G"E4"/"24"/"14",
> > > > E4 means internal ECC and Quad I/O(x4)
> > > > 24 means 8-bit ecc requirement and Quad I/O(x4)
> > > > 14 means 4-bit ecc requirement and Quad I/O(x4)
> > > >
> > > > MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> > > > (without on-die ECC)
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
> > > >
> > > > MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND flash device
> > > > (without on-die ECC)
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
> > > >
> > > > MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
> > > > NAND flash device with 8-bit on-die ECC
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
> > > >
> > > > MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> > > > NAND flash device with 8-bit on-die ECC
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
> > > >
> > > > MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> > > > NAND flash device (without on-die ECC)
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
> > > >
> > > > Validated via normal(default) and QUAD mode by read, erase, read back,
> > > > on Xilinx Zynq PicoZed FPGA board which included Macronix
> > > > SPI Host(drivers/spi/spi-mxic.c).
> > > >
> > > > Cc: stable@vger.kernel.org # 5.10.y
> > > > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > > > Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
> > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > > Link: https://lore.kernel.org/linux-mtd/1621475108-22523-1-git-send-email-jaimeliao@mxic.com.tw
> > > > ---
> > > > drivers/mtd/nand/spi/macronix.c | 110 ++++++++++++++++++++++++++++++++
> > > > 1 file changed, 110 insertions(+)
> > >
> > > This is already in the 5.10.y tree, why are you asking for it to be
> > > applied again?
> > >
> >
> > I accidentally sent the wrong patch, which has already been applied to LTS.
> > I would like to inquire about the possibility of reverting this patch.
>
> Revert what, the one that is in the tree already? If you need/want it
> reverted, please submit a patch to do so along with the reasoning, like
> any other change that is submitted here.
>
No, there's nothing to revert.
Please ignore this patch as I accidentally sent it again,
and it's already in the 5.10.y tree.
> thanks,
>
> greg k-h
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-07-26 5:32 UTC | newest]
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2024-07-17 9:01 [PATCH v5.10.y v2] mtd: spinand: macronix: Add support for serial NAND flash Cheng Ming Lin
2024-07-23 13:36 ` Greg KH
2024-07-26 1:15 ` Cheng Ming Lin
2024-07-26 5:23 ` Greg KH
2024-07-26 5:31 ` Cheng Ming Lin
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