From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC13B19AD6A for ; Tue, 13 Aug 2024 12:32:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.16 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723552339; cv=none; b=XHTOReP1Q77VVmhIIAWWssTHr3R4qaU2vgA3nQXELgiCqJsijuQU3jc1AVbqB5Nn1WZv/IscWsxsh4uhOnwPppHhQ0sQKHgsRPnmnJUTY3Gb9Tif5lfD+UE3ZioW77X1VBUvzjz6xbJNHHKvZ4R/iqLOHHB3IETFPixpm5UJuv0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723552339; c=relaxed/simple; bh=fRm9kV9I35nU4vQID5VZiERzDXNvLV86IQXM9uxB0t8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HRyPHGV5DCiLo9CxWj5ct27miA10MnJQWK4NXn5+i8uY6k0zTJsUdQz8Xryz6h8kZSmbNzYgjoF+lkKlBCL2ZNYGL1VbFdYe4+H2LCEmUh06o1fQGEPbSISft+1WlFoKwFp4niZG46dFqX+lPmw+aJDMHwke1QH26qYU+pnSdhA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jRStKCbq; arc=none smtp.client-ip=192.198.163.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jRStKCbq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723552337; x=1755088337; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fRm9kV9I35nU4vQID5VZiERzDXNvLV86IQXM9uxB0t8=; b=jRStKCbqtQHa9lOIOhJDq+lW2YvPxkWVo2sbnuIgy9ue8x+at9N6oiDV w+xoFiCn7fBw2E9HKwYtkIA0iElLYrotfLFBJFvkemFjHolV/IpOxdbIF aA7lmEWCZiiMiL5Okb8BKrJqkPK5w3yaTOlXJmqTyxSuyq5IIxZy5/Kzd /OiEr4Sw9a0DlKIHYs2YEPjEA88yDO7U8WM/ByHU9myN6k6H7Oc80l1kQ a3krT8CI9qzwDk9xVPpGhQdUiRSmydpQbOfq8x0Qib9EQau440YJKmRQX cWWXxo+64DGU6Gtr26i59t1V7gWdEQliZ9yew5V0yDz+n7CllS+Xh2SCI Q==; X-CSE-ConnectionGUID: qNg4P7j3QQSMzP3Rn/teGQ== X-CSE-MsgGUID: GE9TyCeORZGP9XG86/vkZQ== X-IronPort-AV: E=McAfee;i="6700,10204,11162"; a="12984023" X-IronPort-AV: E=Sophos;i="6.09,285,1716274800"; d="scan'208";a="12984023" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Aug 2024 05:32:16 -0700 X-CSE-ConnectionGUID: /jl+wvPBQ1+dlVhjsO56aQ== X-CSE-MsgGUID: k91nuHFYRnGvcKXRIkcn5w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,285,1716274800"; d="scan'208";a="58595966" Received: from mwiniars-desk2.ger.corp.intel.com (HELO intel.com) ([10.245.246.4]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Aug 2024 05:32:13 -0700 From: Andi Shyti To: stable@vger.kernel.org Cc: Andi Shyti , Jann Horn , Chris Wilson , Joonas Lahtinen , Matthew Auld , Rodrigo Vivi , Jonathan Cavitt Subject: [PATCH 5.10.y] drm/i915/gem: Fix Virtual Memory mapping boundaries calculation Date: Tue, 13 Aug 2024 14:31:53 +0200 Message-ID: <20240813123153.20546-1-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <2024081220-brethren-diagnoses-2569@gregkh> References: <2024081220-brethren-diagnoses-2569@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Commit 8bdd9ef7e9b1b2a73e394712b72b22055e0e26c3 upstream. Calculating the size of the mapped area as the lesser value between the requested size and the actual size does not consider the partial mapping offset. This can cause page fault access. Fix the calculation of the starting and ending addresses, the total size is now deduced from the difference between the end and start addresses. Additionally, the calculations have been rewritten in a clearer and more understandable form. Fixes: c58305af1835 ("drm/i915: Use remap_io_mapping() to prefault all PTE in a single pass") Reported-by: Jann Horn Co-developed-by: Chris Wilson Signed-off-by: Chris Wilson Signed-off-by: Andi Shyti Cc: Joonas Lahtinen Cc: Matthew Auld Cc: Rodrigo Vivi Cc: # v4.9+ Reviewed-by: Jann Horn Reviewed-by: Jonathan Cavitt [Joonas: Add Requires: tag] Requires: 60a2066c5005 ("drm/i915/gem: Adjust vma offset for framebuffer mmap offset") Signed-off-by: Joonas Lahtinen Link: https://patchwork.freedesktop.org/patch/msgid/20240802083850.103694-3-andi.shyti@linux.intel.com (cherry picked from commit 97b6784753da06d9d40232328efc5c5367e53417) Signed-off-by: Joonas Lahtinen --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 53 +++++++++++++++++++++--- 1 file changed, 47 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index 01a88b03bc6d..0021b039b72b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -273,6 +273,41 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf) return i915_error_to_vmf_fault(err); } +static void set_address_limits(struct vm_area_struct *area, + struct i915_vma *vma, + unsigned long obj_offset, + unsigned long *start_vaddr, + unsigned long *end_vaddr) +{ + unsigned long vm_start, vm_end, vma_size; /* user's memory parameters */ + long start, end; /* memory boundaries */ + + /* + * Let's move into the ">> PAGE_SHIFT" + * domain to be sure not to lose bits + */ + vm_start = area->vm_start >> PAGE_SHIFT; + vm_end = area->vm_end >> PAGE_SHIFT; + vma_size = vma->size >> PAGE_SHIFT; + + /* + * Calculate the memory boundaries by considering the offset + * provided by the user during memory mapping and the offset + * provided for the partial mapping. + */ + start = vm_start; + start -= obj_offset; + start += vma->ggtt_view.partial.offset; + end = start + vma_size; + + start = max_t(long, start, vm_start); + end = min_t(long, end, vm_end); + + /* Let's move back into the "<< PAGE_SHIFT" domain */ + *start_vaddr = (unsigned long)start << PAGE_SHIFT; + *end_vaddr = (unsigned long)end << PAGE_SHIFT; +} + static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) { #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT) @@ -285,14 +320,18 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) struct i915_ggtt *ggtt = &i915->ggtt; bool write = area->vm_flags & VM_WRITE; struct i915_gem_ww_ctx ww; + unsigned long obj_offset; + unsigned long start, end; /* memory boundaries */ intel_wakeref_t wakeref; struct i915_vma *vma; pgoff_t page_offset; + unsigned long pfn; int srcu; int ret; - /* We don't use vmf->pgoff since that has the fake offset */ + obj_offset = area->vm_pgoff - drm_vma_node_start(&mmo->vma_node); page_offset = (vmf->address - area->vm_start) >> PAGE_SHIFT; + page_offset += obj_offset; trace_i915_gem_object_fault(obj, page_offset, true, write); @@ -363,12 +402,14 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) if (ret) goto err_unpin; + set_address_limits(area, vma, obj_offset, &start, &end); + + pfn = (ggtt->gmadr.start + i915_ggtt_offset(vma)) >> PAGE_SHIFT; + pfn += (start - area->vm_start) >> PAGE_SHIFT; + pfn += obj_offset - vma->ggtt_view.partial.offset; + /* Finally, remap it using the new GTT offset */ - ret = remap_io_mapping(area, - area->vm_start + (vma->ggtt_view.partial.offset << PAGE_SHIFT), - (ggtt->gmadr.start + vma->node.start) >> PAGE_SHIFT, - min_t(u64, vma->size, area->vm_end - area->vm_start), - &ggtt->iomap); + ret = remap_io_mapping(area, start, pfn, end - start, &ggtt->iomap); if (ret) goto err_fence; -- 2.45.2