From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B50A1BD512; Wed, 25 Sep 2024 11:48:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727264901; cv=none; b=HgCcLAVQNUDQ17nzPH9u86K6ocqX2Hpvg4qkiFFKndLEHkif0gQx0GX6RTtrrWcrm0cRhXQEIRfIAONulKzueAmiTO2TkWKP7IrzgRhGZPZEz+T+3FA4WbSveTU2yqZyEIF5M4I6shr6dV5Os7EGgO73gc0f9nlNz20VIbf+KTQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727264901; c=relaxed/simple; bh=BxcwbgJ/CnH0K4cDKwkcguF41kZNgM81f4D/TFs+Ny4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rahF6bNZgHtJ3yiAouEZbz+VDpQxiQUge6SQ/Ah4W6qGHX+ZqQuIGkpWpCXQQ5K6/E+qOaZ+NzIc+Yw0Gxii7908NJ3F+SBtJiG4ZefhVuTevY2wbEED7VnD/mDnLPQ2OlqjZTn0rw/TMJ9oNEx/tpK1pwUbcuQW2zdv/vOstM4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=G4o2ShcG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="G4o2ShcG" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A2A3EC4CECD; Wed, 25 Sep 2024 11:48:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1727264900; bh=BxcwbgJ/CnH0K4cDKwkcguF41kZNgM81f4D/TFs+Ny4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G4o2ShcGfqpiLHncUXbHg580cnA0g25odb2nIGR7+bbdR7+XHN/NZhQ/G7Li9aoKD TjX/CfRDNFlQ5G+9Kmyr69G7lUDoaoHICMGn3RxTGNFQ+YM8TQ9UZ2iR7MClD2+D5s IIUjcBHQt3BfV4cFDdn1f8RTNeKVVL+LMMeuzx5J38HXOl92jqAs1pPCT/nd7Jj5my NF9qgdJ0jWAOabUCPdIvmK8VtRYAl4YMCP+DMk0gjhHZ1HndNFYeVPRbwznr20VaBk tSQuZb5y1Fo93ymA96yYiOVR8hfEiTT7djXLXLp0bbXRjYXH3xBP5v35UtbRxi//PF X04CXJDwRJy8Q== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Yannick Fertre , Raphael Gallais-Pou , Sasha Levin , philippe.cornu@foss.st.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, dri-devel@lists.freedesktop.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 6.11 178/244] drm/stm: ltdc: reset plane transparency after plane disable Date: Wed, 25 Sep 2024 07:26:39 -0400 Message-ID: <20240925113641.1297102-178-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240925113641.1297102-1-sashal@kernel.org> References: <20240925113641.1297102-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.11 Content-Transfer-Encoding: 8bit From: Yannick Fertre [ Upstream commit 02fa62d41c8abff945bae5bfc3ddcf4721496aca ] The plane's opacity should be reseted while the plane is disabled. It prevents from seeing a possible global or layer background color set earlier. Signed-off-by: Yannick Fertre Link: https://patchwork.freedesktop.org/patch/msgid/20240712131344.98113-1-yannick.fertre@foss.st.com Signed-off-by: Raphael Gallais-Pou Signed-off-by: Sasha Levin --- drivers/gpu/drm/stm/ltdc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index eeaabb4e10d3e..9e76785cb2691 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -1513,6 +1513,9 @@ static void ltdc_plane_atomic_disable(struct drm_plane *plane, /* Disable layer */ regmap_write_bits(ldev->regmap, LTDC_L1CR + lofs, LXCR_LEN | LXCR_CLUTEN | LXCR_HMEN, 0); + /* Reset the layer transparency to hide any related background color */ + regmap_write_bits(ldev->regmap, LTDC_L1CACR + lofs, LXCACR_CONSTA, 0x00); + /* Commit shadow registers = update plane at next vblank */ if (ldev->caps.plane_reg_shadow) regmap_write_bits(ldev->regmap, LTDC_L1RCR + lofs, -- 2.43.0