From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C41D11C07CF; Tue, 15 Oct 2024 13:02:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728997371; cv=none; b=iNQhEe1i6szO+n77TentIRGVEJyVprJwpqX8z6od344b8neXcpL89DoMvFApfSjLhgpxik5G9xFC2mvZB1m/ANwDavVoTRPnU+z2rbND06zPzruZRnfTN6/Pg3WtiegMk4SL5KR/zYPPLID1gXqY8ikZDCTK0NcWGzZ3cRIne4c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728997371; c=relaxed/simple; bh=8zky9ez+cbnPpNi80194BxglR0mFOIWVOslw3G2CMHI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GVLiInk4OQOyUzRCu1MvXmvq1luh4CUu1E/Zrji9HqJbjygFOspN9Up8zZjRDuLyS9FqX4SdaN/kokj5tB7b/aeE990mYzuAjpQMff7BxZ35cQ3PzSFmXLgEPgfcpq8BLcuAPHaziJfuMw1sZZ3F1wWPbEL6wjQoEzQOeSTeoe4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=UsrVlOwA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="UsrVlOwA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 00B97C4CEC6; Tue, 15 Oct 2024 13:02:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1728997371; bh=8zky9ez+cbnPpNi80194BxglR0mFOIWVOslw3G2CMHI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UsrVlOwAlk/mG61nOWJ5IFr46rZkApDPB0DF7ytAY0PEKhsGig1kko4l7jJWL2jqF 7SQmm8J0m/Ykh7eTkTbpPDGXRrxWTIB5p3248Ncwv4KODYU0NsfvoBIGUBsQQAsZTR 6tt4kg9OiDJkqu2HILj+E2BYdyMcfwXBMkEndSVU= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Jonas Karlman , Heiko Stuebner , Sasha Levin Subject: [PATCH 5.10 162/518] clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228 Date: Tue, 15 Oct 2024 14:41:06 +0200 Message-ID: <20241015123923.252409226@linuxfoundation.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241015123916.821186887@linuxfoundation.org> References: <20241015123916.821186887@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Jonas Karlman [ Upstream commit 1d34b9757523c1ad547bd6d040381f62d74a3189 ] Similar to DCLK_LCDC on RK3328, the DCLK_VOP on RK3228 is typically parented by the hdmiphy clk and it is expected that the DCLK_VOP and hdmiphy clk rate are kept in sync. Use CLK_SET_RATE_PARENT and CLK_SET_RATE_NO_REPARENT flags, same as used on RK3328, to make full use of all possible supported display modes. Fixes: 0a9d4ac08ebc ("clk: rockchip: set the clock ids for RK3228 VOP") Fixes: 307a2e9ac524 ("clk: rockchip: add clock controller for rk3228") Signed-off-by: Jonas Karlman Link: https://lore.kernel.org/r/20240615170417.3134517-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner Signed-off-by: Sasha Levin --- drivers/clk/rockchip/clk-rk3228.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c index 47d6482dda9df..a2b4d54875142 100644 --- a/drivers/clk/rockchip/clk-rk3228.c +++ b/drivers/clk/rockchip/clk-rk3228.c @@ -408,7 +408,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { RK2928_CLKSEL_CON(29), 0, 3, DFLAGS), DIV(0, "sclk_vop_pre", "sclk_vop_src", 0, RK2928_CLKSEL_CON(27), 8, 8, DFLAGS), - MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0, + MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, RK2928_CLKSEL_CON(27), 1, 1, MFLAGS), FACTOR(0, "xin12m", "xin24m", 0, 1, 2), -- 2.43.0