public inbox for stable@vger.kernel.org
 help / color / mirror / Atom feed
* [PATCH 6.6] serial: sc16is7xx: fix invalid FIFO access with special register set
@ 2024-11-22  6:43 Bin Lan
  2024-11-22 13:51 ` Sasha Levin
  0 siblings, 1 reply; 5+ messages in thread
From: Bin Lan @ 2024-11-22  6:43 UTC (permalink / raw)
  To: stable, hvilleneuve

From: Hugo Villeneuve <hvilleneuve@dimonoff.com>

[ Upstream commit 7d3b793faaab1305994ce568b59d61927235f57b ]

When enabling access to the special register set, Receiver time-out and
RHR interrupts can happen. In this case, the IRQ handler will try to read
from the FIFO thru the RHR register at address 0x00, but address 0x00 is
mapped to DLL register, resulting in erroneous FIFO reading.

Call graph example:
    sc16is7xx_startup(): entry
    sc16is7xx_ms_proc(): entry
    sc16is7xx_set_termios(): entry
    sc16is7xx_set_baud(): DLH/DLL = $009C --> access special register set
    sc16is7xx_port_irq() entry            --> IIR is 0x0C
    sc16is7xx_handle_rx() entry
    sc16is7xx_fifo_read(): --> unable to access FIFO (RHR) because it is
                               mapped to DLL (LCR=LCR_CONF_MODE_A)
    sc16is7xx_set_baud(): exit --> Restore access to general register set

Fix the problem by claiming the efr_lock mutex when accessing the Special
register set.

Fixes: dfeae619d781 ("serial: sc16is7xx")
Cc: stable@vger.kernel.org
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Link: https://lore.kernel.org/r/20240723125302.1305372-3-hugo@hugovil.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Resolve minor conflicts ]
Signed-off-by: Bin Lan <bin.lan.cn@windriver.com>
---
 drivers/tty/serial/sc16is7xx.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index 7a9924d9b294..f290fbe21d63 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -545,6 +545,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
 			      SC16IS7XX_MCR_CLKSEL_BIT,
 			      prescaler == 1 ? 0 : SC16IS7XX_MCR_CLKSEL_BIT);
 
+	mutex_lock(&one->efr_lock);
+
 	/* Open the LCR divisors for configuration */
 	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
 			     SC16IS7XX_LCR_CONF_MODE_A);
@@ -558,6 +560,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
 	/* Put LCR back to the normal mode */
 	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
 
+	mutex_unlock(&one->efr_lock);
+
 	return DIV_ROUND_CLOSEST((clk / prescaler) / 16, div);
 }
 
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH 6.6] serial: sc16is7xx: fix invalid FIFO access with special register set
  2024-11-22  6:43 Bin Lan
@ 2024-11-22 13:51 ` Sasha Levin
  0 siblings, 0 replies; 5+ messages in thread
From: Sasha Levin @ 2024-11-22 13:51 UTC (permalink / raw)
  To: stable; +Cc: Bin Lan, Sasha Levin

[ Sasha's backport helper bot ]

Hi,

The upstream commit SHA1 provided is correct: 7d3b793faaab1305994ce568b59d61927235f57b

WARNING: Author mismatch between patch and upstream commit:
Backport author: Bin Lan <bin.lan.cn@windriver.com>
Commit author: Hugo Villeneuve <hvilleneuve@dimonoff.com>


Status in newer kernel trees:
6.12.y | Present (exact SHA1)
6.11.y | Present (exact SHA1)
6.6.y | Not found

Note: The patch differs from the upstream commit:
---
--- -	2024-11-22 08:26:44.256901766 -0500
+++ /tmp/tmp.CWNfMe5MUW	2024-11-22 08:26:44.252793305 -0500
@@ -1,3 +1,5 @@
+[ Upstream commit 7d3b793faaab1305994ce568b59d61927235f57b ]
+
 When enabling access to the special register set, Receiver time-out and
 RHR interrupts can happen. In this case, the IRQ handler will try to read
 from the FIFO thru the RHR register at address 0x00, but address 0x00 is
@@ -22,25 +24,27 @@
 Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
 Link: https://lore.kernel.org/r/20240723125302.1305372-3-hugo@hugovil.com
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+[ Resolve minor conflicts ]
+Signed-off-by: Bin Lan <bin.lan.cn@windriver.com>
 ---
  drivers/tty/serial/sc16is7xx.c | 4 ++++
  1 file changed, 4 insertions(+)
 
 diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
-index 58696e05492ca..b4c1798a1df2a 100644
+index 7a9924d9b294..f290fbe21d63 100644
 --- a/drivers/tty/serial/sc16is7xx.c
 +++ b/drivers/tty/serial/sc16is7xx.c
-@@ -592,6 +592,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
+@@ -545,6 +545,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
  			      SC16IS7XX_MCR_CLKSEL_BIT,
  			      prescaler == 1 ? 0 : SC16IS7XX_MCR_CLKSEL_BIT);
  
 +	mutex_lock(&one->efr_lock);
 +
- 	/* Backup LCR and access special register set (DLL/DLH) */
- 	lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG);
+ 	/* Open the LCR divisors for configuration */
  	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
-@@ -606,6 +608,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
- 	/* Restore LCR and access to general register set */
+ 			     SC16IS7XX_LCR_CONF_MODE_A);
+@@ -558,6 +560,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
+ 	/* Put LCR back to the normal mode */
  	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
  
 +	mutex_unlock(&one->efr_lock);
@@ -48,3 +52,6 @@
  	return DIV_ROUND_CLOSEST((clk / prescaler) / 16, div);
  }
  
+-- 
+2.43.0
+
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-6.6.y        |  Success    |  Success   |

^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH 6.6] serial: sc16is7xx: fix invalid FIFO access with special register set
@ 2024-11-26  2:18 Bin Lan
  2024-11-26  3:13 ` Sasha Levin
  0 siblings, 1 reply; 5+ messages in thread
From: Bin Lan @ 2024-11-26  2:18 UTC (permalink / raw)
  To: stable, hvilleneuve; +Cc: bin.lan.cn

From: Hugo Villeneuve <hvilleneuve@dimonoff.com>

[ Upstream commit 7d3b793faaab1305994ce568b59d61927235f57b ]

When enabling access to the special register set, Receiver time-out and
RHR interrupts can happen. In this case, the IRQ handler will try to read
from the FIFO thru the RHR register at address 0x00, but address 0x00 is
mapped to DLL register, resulting in erroneous FIFO reading.

Call graph example:
    sc16is7xx_startup(): entry
    sc16is7xx_ms_proc(): entry
    sc16is7xx_set_termios(): entry
    sc16is7xx_set_baud(): DLH/DLL = $009C --> access special register set
    sc16is7xx_port_irq() entry            --> IIR is 0x0C
    sc16is7xx_handle_rx() entry
    sc16is7xx_fifo_read(): --> unable to access FIFO (RHR) because it is
                               mapped to DLL (LCR=LCR_CONF_MODE_A)
    sc16is7xx_set_baud(): exit --> Restore access to general register set

Fix the problem by claiming the efr_lock mutex when accessing the Special
register set.

Fixes: dfeae619d781 ("serial: sc16is7xx")
Cc: stable@vger.kernel.org
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Link: https://lore.kernel.org/r/20240723125302.1305372-3-hugo@hugovil.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Resolve minor conflicts ]
Signed-off-by: Bin Lan <bin.lan.cn@windriver.com>
---
 drivers/tty/serial/sc16is7xx.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index 7a9924d9b294..d7728920853e 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -545,6 +545,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
 			      SC16IS7XX_MCR_CLKSEL_BIT,
 			      prescaler == 1 ? 0 : SC16IS7XX_MCR_CLKSEL_BIT);
 
+	mutex_lock(&one->efr_lock);
+	
 	/* Open the LCR divisors for configuration */
 	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
 			     SC16IS7XX_LCR_CONF_MODE_A);
@@ -558,6 +560,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
 	/* Put LCR back to the normal mode */
 	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
 
+	mutex_unlock(&one->efr_lock);
+
 	return DIV_ROUND_CLOSEST((clk / prescaler) / 16, div);
 }
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH 6.6] serial: sc16is7xx: fix invalid FIFO access with special register set
  2024-11-26  2:18 [PATCH 6.6] serial: sc16is7xx: fix invalid FIFO access with special register set Bin Lan
@ 2024-11-26  3:13 ` Sasha Levin
  2024-11-26  6:07   ` Bin Lan
  0 siblings, 1 reply; 5+ messages in thread
From: Sasha Levin @ 2024-11-26  3:13 UTC (permalink / raw)
  To: stable; +Cc: Bin Lan, Sasha Levin

[ Sasha's backport helper bot ]

Hi,

The upstream commit SHA1 provided is correct: 7d3b793faaab1305994ce568b59d61927235f57b

WARNING: Author mismatch between patch and upstream commit:
Backport author: Bin Lan <bin.lan.cn@windriver.com>
Commit author: Hugo Villeneuve <hvilleneuve@dimonoff.com>


Status in newer kernel trees:
6.12.y | Present (exact SHA1)
6.11.y | Present (exact SHA1)
6.6.y | Present (different SHA1: 19c41869465c)

Note: The patch differs from the upstream commit:
---
--- -	2024-11-25 21:31:42.179789487 -0500
+++ /tmp/tmp.38G55Mxp3K	2024-11-25 21:31:42.172164427 -0500
@@ -1,3 +1,5 @@
+[ Upstream commit 7d3b793faaab1305994ce568b59d61927235f57b ]
+
 When enabling access to the special register set, Receiver time-out and
 RHR interrupts can happen. In this case, the IRQ handler will try to read
 from the FIFO thru the RHR register at address 0x00, but address 0x00 is
@@ -22,25 +24,27 @@
 Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
 Link: https://lore.kernel.org/r/20240723125302.1305372-3-hugo@hugovil.com
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+[ Resolve minor conflicts ]
+Signed-off-by: Bin Lan <bin.lan.cn@windriver.com>
 ---
  drivers/tty/serial/sc16is7xx.c | 4 ++++
  1 file changed, 4 insertions(+)
 
 diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
-index 58696e05492ca..b4c1798a1df2a 100644
+index 7a9924d9b294..d7728920853e 100644
 --- a/drivers/tty/serial/sc16is7xx.c
 +++ b/drivers/tty/serial/sc16is7xx.c
-@@ -592,6 +592,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
+@@ -545,6 +545,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
  			      SC16IS7XX_MCR_CLKSEL_BIT,
  			      prescaler == 1 ? 0 : SC16IS7XX_MCR_CLKSEL_BIT);
  
 +	mutex_lock(&one->efr_lock);
-+
- 	/* Backup LCR and access special register set (DLL/DLH) */
- 	lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG);
++	
+ 	/* Open the LCR divisors for configuration */
  	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
-@@ -606,6 +608,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
- 	/* Restore LCR and access to general register set */
+ 			     SC16IS7XX_LCR_CONF_MODE_A);
+@@ -558,6 +560,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
+ 	/* Put LCR back to the normal mode */
  	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
  
 +	mutex_unlock(&one->efr_lock);
@@ -48,3 +52,6 @@
  	return DIV_ROUND_CLOSEST((clk / prescaler) / 16, div);
  }
  
+-- 
+2.34.1
+
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-6.6.y        |  Success    |  Success   |

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH 6.6] serial: sc16is7xx: fix invalid FIFO access with special register set
  2024-11-26  3:13 ` Sasha Levin
@ 2024-11-26  6:07   ` Bin Lan
  0 siblings, 0 replies; 5+ messages in thread
From: Bin Lan @ 2024-11-26  6:07 UTC (permalink / raw)
  To: Sasha Levin, stable


On 11/26/2024 11:13 AM, Sasha Levin wrote:
> CAUTION: This email comes from a non Wind River email account!
> Do not click links or open attachments unless you recognize the sender and know the content is safe.
>
> [ Sasha's backport helper bot ]
>
> Hi,
>
> The upstream commit SHA1 provided is correct: 7d3b793faaab1305994ce568b59d61927235f57b
>
> WARNING: Author mismatch between patch and upstream commit:
> Backport author: Bin Lan <bin.lan.cn@windriver.com>
> Commit author: Hugo Villeneuve <hvilleneuve@dimonoff.com>
>
>
> Status in newer kernel trees:
> 6.12.y | Present (exact SHA1)
> 6.11.y | Present (exact SHA1)
> 6.6.y | Present (different SHA1: 19c41869465c)

Since the patch for 6.6.y is present, Please ignore this patch.

B.R.

Bin Lan

>
> Note: The patch differs from the upstream commit:
> ---
> --- -   2024-11-25 21:31:42.179789487 -0500
> +++ /tmp/tmp.38G55Mxp3K 2024-11-25 21:31:42.172164427 -0500
> @@ -1,3 +1,5 @@
> +[ Upstream commit 7d3b793faaab1305994ce568b59d61927235f57b ]
> +
>   When enabling access to the special register set, Receiver time-out and
>   RHR interrupts can happen. In this case, the IRQ handler will try to read
>   from the FIFO thru the RHR register at address 0x00, but address 0x00 is
> @@ -22,25 +24,27 @@
>   Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
>   Link: https://lore.kernel.org/r/20240723125302.1305372-3-hugo@hugovil.com
>   Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> +[ Resolve minor conflicts ]
> +Signed-off-by: Bin Lan <bin.lan.cn@windriver.com>
>   ---
>    drivers/tty/serial/sc16is7xx.c | 4 ++++
>    1 file changed, 4 insertions(+)
>
>   diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
> -index 58696e05492ca..b4c1798a1df2a 100644
> +index 7a9924d9b294..d7728920853e 100644
>   --- a/drivers/tty/serial/sc16is7xx.c
>   +++ b/drivers/tty/serial/sc16is7xx.c
> -@@ -592,6 +592,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
> +@@ -545,6 +545,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
>                                SC16IS7XX_MCR_CLKSEL_BIT,
>                                prescaler == 1 ? 0 : SC16IS7XX_MCR_CLKSEL_BIT);
>
>   +      mutex_lock(&one->efr_lock);
> -+
> -       /* Backup LCR and access special register set (DLL/DLH) */
> -       lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG);
> ++
> +       /* Open the LCR divisors for configuration */
>          sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
> -@@ -606,6 +608,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
> -       /* Restore LCR and access to general register set */
> +                            SC16IS7XX_LCR_CONF_MODE_A);
> +@@ -558,6 +560,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
> +       /* Put LCR back to the normal mode */
>          sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
>
>   +      mutex_unlock(&one->efr_lock);
> @@ -48,3 +52,6 @@
>          return DIV_ROUND_CLOSEST((clk / prescaler) / 16, div);
>    }
>
> +--
> +2.34.1
> +
> ---
>
> Results of testing on various branches:
>
> | Branch                    | Patch Apply | Build Test |
> |---------------------------|-------------|------------|
> | stable/linux-6.6.y        |  Success    |  Success   |

^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-11-26  6:06 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-11-26  2:18 [PATCH 6.6] serial: sc16is7xx: fix invalid FIFO access with special register set Bin Lan
2024-11-26  3:13 ` Sasha Levin
2024-11-26  6:07   ` Bin Lan
  -- strict thread matches above, loose matches on Subject: below --
2024-11-22  6:43 Bin Lan
2024-11-22 13:51 ` Sasha Levin

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox