Re: [PATCH 5.4.y] PCI: rockchip-ep: Fix address translation unit programming

[Sasha Levin <sashal@kernel.org>]

[ Sasha's backport helper bot ]

Hi,

Found matching upstream commit: 64f093c4d99d797b68b407a9d8767aadc3e3ea7a


Status in newer kernel trees:
6.12.y | Present (different SHA1: ac9e6da4b96c)
6.6.y | Present (different SHA1: c26371c3c46c)
6.1.y | Present (different SHA1: 2d9d52b990b0)
5.15.y | Present (different SHA1: 46fa1a3f32ae)
5.10.y | Not found
5.4.y | Not found

Note: The patch differs from the upstream commit:
---
1:  64f093c4d99d7 ! 1:  64746368e3317 PCI: rockchip-ep: Fix address translation unit programming
    @@ Commit message
         Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
         Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
         Cc: stable@vger.kernel.org
    +    (cherry picked from commit 64f093c4d99d797b68b407a9d8767aadc3e3ea7a)
     
      ## drivers/pci/controller/pcie-rockchip-ep.c ##
     @@ drivers/pci/controller/pcie-rockchip-ep.c: static void rockchip_pcie_clear_ep_ob_atu(struct rockchip_pcie *rockchip,
    - 			    ROCKCHIP_PCIE_AT_OB_REGION_DESC1(region));
    + 			    ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR1(region));
      }
      
     +static int rockchip_pcie_ep_ob_atu_num_bits(struct rockchip_pcie *rockchip,
    @@ drivers/pci/controller/pcie-rockchip-ep.c: static void rockchip_pcie_clear_ep_ob
     +}
     +
      static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn,
    - 					 u32 r, u64 cpu_addr, u64 pci_addr,
    - 					 size_t size)
    + 					 u32 r, u32 type, u64 cpu_addr,
    + 					 u64 pci_addr, size_t size)
      {
    --	int num_pass_bits = fls64(size - 1);
    +-	u64 sz = 1ULL << fls64(size - 1);
    +-	int num_pass_bits = ilog2(sz);
     +	int num_pass_bits;
    - 	u32 addr0, addr1, desc0;
    + 	u32 addr0, addr1, desc0, desc1;
    + 	bool is_nor_msg = (type == AXI_WRAPPER_NOR_MSG);
      
    +-	/* The minimal region size is 1MB */
     -	if (num_pass_bits < 8)
     -		num_pass_bits = 8;
     +	num_pass_bits = rockchip_pcie_ep_ob_atu_num_bits(rockchip,
     +							 pci_addr, size);
      
    - 	addr0 = ((num_pass_bits - 1) & PCIE_CORE_OB_REGION_ADDR0_NUM_BITS) |
    - 		(lower_32_bits(pci_addr) & PCIE_CORE_OB_REGION_ADDR0_LO_ADDR);
    + 	cpu_addr -= rockchip->mem_res->start;
    + 	addr0 = ((is_nor_msg ? 0x10 : (num_pass_bits - 1)) &
     
      ## drivers/pci/controller/pcie-rockchip.h ##
     @@
    - 	(PCIE_EP_PF_CONFIG_REGS_BASE + (((fn) << 12) & GENMASK(19, 12)))
    - #define ROCKCHIP_PCIE_EP_VIRT_FUNC_BASE(fn) \
    - 	(PCIE_EP_PF_CONFIG_REGS_BASE + 0x10000 + (((fn) << 12) & GENMASK(19, 12)))
    + #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MASK_MSI_CAP	BIT(24)
    + #define ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR				0x1
    + #define ROCKCHIP_PCIE_EP_FUNC_BASE(fn)	(((fn) << 12) & GENMASK(19, 12))
     +
     +#define ROCKCHIP_PCIE_AT_MIN_NUM_BITS  8
     +#define ROCKCHIP_PCIE_AT_MAX_NUM_BITS  20
     +
      #define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar) \
    - 	(PCIE_CORE_AXI_CONF_BASE + 0x0828 + (fn) * 0x0040 + (bar) * 0x0008)
    + 	(PCIE_RC_RP_ATS_BASE + 0x0840 + (fn) * 0x0040 + (bar) * 0x0008)
      #define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar) \
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-5.4.y        |  Success    |  Success   |