From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E071F2236F0; Thu, 12 Dec 2024 17:47:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734025652; cv=none; b=Vg2L7UF+Db38WDp8XYvxzEPGe/NW/SAMPjE0oANbz65ll3CRfB7CPe/7RMDZ65Ta1ZZvuacoraakvCc8j4BYnFlrwLo2rOCW1tBh/kYd/4+fT5bbxzIstdId/ykRW85mwfMeypE9ujAf7+Q6a1u7ol3TJIgVQ6FBq+T8p+b7l6w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734025652; c=relaxed/simple; bh=4SWuT9gypCf+T/t7QOWEfrdKJu6qjOq0tCz3ZLUd1Ic=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ezpvVsTsx8oDRGq/0wMHRVhm4cOXGzksC+T2eHTvudw65LR3Wm3BqvfAlH9YSgljS+QcBH2I7TYkTUF4dIuj5kuslySdFx8ayYJaJi/vQrm1pwfPgfmRoNDCZ95Wm5q/q7FncwhGBE3+sYV9fWvxJ4eVl+SAMS842yjvlICzEwo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=RG/zhyJP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="RG/zhyJP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 67E7CC4CECE; Thu, 12 Dec 2024 17:47:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1734025651; bh=4SWuT9gypCf+T/t7QOWEfrdKJu6qjOq0tCz3ZLUd1Ic=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RG/zhyJPmXSxYuSqf8kzG4Dpa7T0kPcNwafYnrsoNiDOvEYKQttHsiW5R/1dSpczn b3mEvTd2x4hkk3+VLaDXsN1jMuEzu/YWLb2VJTN1BL5NfoGzFaO80vl9+ugBy9J7pE uzSAal+kkMh7+VFYBWzD/Ob7jnek33QErGAXbHVQ= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Gabor Juhos , Bjorn Andersson Subject: [PATCH 5.4 211/321] clk: qcom: gcc-qcs404: fix initial rate of GPLL3 Date: Thu, 12 Dec 2024 16:02:09 +0100 Message-ID: <20241212144238.315250230@linuxfoundation.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241212144229.291682835@linuxfoundation.org> References: <20241212144229.291682835@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.4-stable review patch. If anyone has any objections, please let me know. ------------------ From: Gabor Juhos commit 36d202241d234fa4ac50743510d098ad52bd193a upstream. The comment before the config of the GPLL3 PLL says that the PLL should run at 930 MHz. In contrary to this, calculating the frequency from the current configuration values by using 19.2 MHz as input frequency defined in 'qcs404.dtsi', it gives 921.6 MHz: $ xo=19200000; l=48; alpha=0x0; alpha_hi=0x0 $ echo "$xo * ($((l)) + $(((alpha_hi << 32 | alpha) >> 8)) / 2^32)" | bc -l 921600000.00000000000000000000 Set 'alpha_hi' in the configuration to a value used in downstream kernels [1][2] in order to get the correct output rate: $ xo=19200000; l=48; alpha=0x0; alpha_hi=0x70 $ echo "$xo * ($((l)) + $(((alpha_hi << 32 | alpha) >> 8)) / 2^32)" | bc -l 930000000.00000000000000000000 The change is based on static code analysis, compile tested only. [1] https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/kernel.lnx.5.4.r56-rel/drivers/clk/qcom/gcc-qcs404.c?ref_type=heads#L335 [2} https://git.codelinaro.org/clo/la/kernel/msm-5.15/-/blob/kernel.lnx.5.15.r49-rel/drivers/clk/qcom/gcc-qcs404.c?ref_type=heads#L127 Cc: stable@vger.kernel.org Fixes: 652f1813c113 ("clk: qcom: gcc: Add global clock controller driver for QCS404") Signed-off-by: Gabor Juhos Link: https://lore.kernel.org/r/20241022-fix-gcc-qcs404-gpll3-v1-1-c4d30d634d19@gmail.com Signed-off-by: Bjorn Andersson Signed-off-by: Greg Kroah-Hartman --- drivers/clk/qcom/gcc-qcs404.c | 1 + 1 file changed, 1 insertion(+) --- a/drivers/clk/qcom/gcc-qcs404.c +++ b/drivers/clk/qcom/gcc-qcs404.c @@ -337,6 +337,7 @@ static struct clk_alpha_pll gpll1_out_ma /* 930MHz configuration */ static const struct alpha_pll_config gpll3_config = { .l = 48, + .alpha_hi = 0x70, .alpha = 0x0, .alpha_en_mask = BIT(24), .post_div_mask = 0xf << 8,