From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 515B118D649; Wed, 5 Feb 2025 14:58:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738767484; cv=none; b=hHmweBAevpXWZID8tMzl07vLh6XmjwFJ4Vexb8UolLVHsL734ULdP2t8R8eS4dd0zSylPhagGykBd+qJrTESt2DcNV2ULsAr49qJLQir++4CnDRlYKxKciScE0sRb5pRI9XE8poEaQmjV3/ATw4p9/ChYkpfKphBtC+2UJGQKsI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738767484; c=relaxed/simple; bh=Iv3h0c1+ciJO8x2v9p4GRQr255hDUOFbfpBoy5UrumQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=avI0AL6Bs28QPKGpqs7gM8xJC/Z3baN3mXM5JTWmYSCpTdz1TwhLANHxOOLE9RO3QgPwr16krv7fAeS5PHzjEoea6n88RxFI8lBBSyz4qkR4XKcACZMNYGO9+uxoA7MxqZnRBOn2KbYnXOIvKzTbgJ74I1wYsVSFjIrff7mZBxY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=GLCYu97F; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="GLCYu97F" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4F90FC4CED1; Wed, 5 Feb 2025 14:58:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1738767483; bh=Iv3h0c1+ciJO8x2v9p4GRQr255hDUOFbfpBoy5UrumQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GLCYu97FdINZkUAreMCGxdZUo/V/ZRM1gPbxEFjOqJ5jJnWqp7goOXnHtqN/R6uuj 2xfvhtYiJXDXG/81NX8/WDt+0usTd73A6d3NLK/dFliFzWll1J5Z2duCML+0ozmYN1 sjBDJ6KSk1y6L99KMXVM8KG586KtuQ1dZ/T5H4aI= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Adam Ford , Marco Felsch , Frieder Schrempf , Dominique Martinet , Vinod Koul , Sasha Levin Subject: [PATCH 6.12 463/590] phy: freescale: fsl-samsung-hdmi: Simplify REG21_PMS_S_MASK lookup Date: Wed, 5 Feb 2025 14:43:38 +0100 Message-ID: <20250205134512.974802928@linuxfoundation.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250205134455.220373560@linuxfoundation.org> References: <20250205134455.220373560@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Adam Ford [ Upstream commit 375ee44adb3640099508c5c0c01d86f0bdb16e97 ] The value of 'S' is writen to two places, PHY_REG3[7:4] and PHY_REG21[3:0]. There is a lookup table which contains the value of PHY_REG3. Rather than using a switch statement based on the pixel clock to search for the value of 'S' again, just shift the contents of PHY_REG3[7:4] >> 4 and place the value in PHY_REG21[3:0]. Doing this can eliminate an entire function. Signed-off-by: Adam Ford Reviewed-by: Marco Felsch Reviewed-by: Frieder Schrempf Tested-by: Frieder Schrempf Reviewed-by: Dominique Martinet Tested-by: Dominique Martinet Link: https://lore.kernel.org/r/20240914112816.520224-3-aford173@gmail.com Signed-off-by: Vinod Koul Stable-dep-of: d567679f2b6a ("phy: freescale: fsl-samsung-hdmi: Clean up fld_tg_code calculation") Signed-off-by: Sasha Levin --- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 39 ++------------------ 1 file changed, 4 insertions(+), 35 deletions(-) diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index acea7008aefc5..4f6874226f9ab 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -364,40 +364,6 @@ to_fsl_samsung_hdmi_phy(struct clk_hw *hw) return container_of(hw, struct fsl_samsung_hdmi_phy, hw); } -static void -fsl_samsung_hdmi_phy_configure_pixclk(struct fsl_samsung_hdmi_phy *phy, - const struct phy_config *cfg) -{ - u8 div = 0x1; - - switch (cfg->pixclk) { - case 22250000 ... 33750000: - div = 0xf; - break; - case 35000000 ... 40000000: - div = 0xb; - break; - case 43200000 ... 47500000: - div = 0x9; - break; - case 50349650 ... 63500000: - div = 0x7; - break; - case 67500000 ... 90000000: - div = 0x5; - break; - case 94000000 ... 148500000: - div = 0x3; - break; - case 154000000 ... 297000000: - div = 0x1; - break; - } - - writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, div), - phy->regs + PHY_REG(21)); -} - static void fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, const struct phy_config *cfg) @@ -466,7 +432,10 @@ static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, for (i = 0; i < PHY_PLL_DIV_REGS_NUM; i++) writeb(cfg->pll_div_regs[i], phy->regs + PHY_REG(2) + i * 4); - fsl_samsung_hdmi_phy_configure_pixclk(phy, cfg); + /* High nibble of pll_div_regs[1] contains S which also gets written to REG21 */ + writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, + cfg->pll_div_regs[1] >> 4), phy->regs + PHY_REG(21)); + fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); writeb(REG33_FIX_DA | REG33_MODE_SET_DONE, phy->regs + PHY_REG(33)); -- 2.39.5