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* [PATCH 5.10] crypto: hisilicon/qm - inject error before stopping queue
@ 2025-03-07  8:42 Xiangyu Chen
  2025-03-10  2:14 ` Sasha Levin
  0 siblings, 1 reply; 2+ messages in thread
From: Xiangyu Chen @ 2025-03-07  8:42 UTC (permalink / raw)
  To: qianweili, herbert; +Cc: gregkh, stable, zhe.he

From: Weili Qian <qianweili@huawei.com>

commit b04f06fc0243600665b3b50253869533b7938468 upstream.

The master ooo cannot be completely closed when the
accelerator core reports memory error. Therefore, the driver
needs to inject the qm error to close the master ooo. Currently,
the qm error is injected after stopping queue, memory may be
released immediately after stopping queue, causing the device to
access the released memory. Therefore, error is injected to close master
ooo before stopping queue to ensure that the device does not access
the released memory.

Fixes: 6c6dd5802c2d ("crypto: hisilicon/qm - add controller reset interface")
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Xiangyu Chen <xiangyu.chen@windriver.com>
Signed-off-by: He Zhe <zhe.he@windriver.com>
---
Verified the code compile on arm64 toolchain
---
 drivers/crypto/hisilicon/qm.c | 46 +++++++++++++++++------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
index 530f23116d7c..8988ee714ce1 100644
--- a/drivers/crypto/hisilicon/qm.c
+++ b/drivers/crypto/hisilicon/qm.c
@@ -3354,6 +3354,27 @@ static int qm_set_vf_mse(struct hisi_qm *qm, bool set)
 	return -ETIMEDOUT;
 }
 
+static void qm_dev_ecc_mbit_handle(struct hisi_qm *qm)
+{
+	u32 nfe_enb = 0;
+
+	if (!qm->err_status.is_dev_ecc_mbit &&
+	    qm->err_status.is_qm_ecc_mbit &&
+	    qm->err_ini->close_axi_master_ooo) {
+
+		qm->err_ini->close_axi_master_ooo(qm);
+
+	} else if (qm->err_status.is_dev_ecc_mbit &&
+		   !qm->err_status.is_qm_ecc_mbit &&
+		   !qm->err_ini->close_axi_master_ooo) {
+
+		nfe_enb = readl(qm->io_base + QM_RAS_NFE_ENABLE);
+		writel(nfe_enb & QM_RAS_NFE_MBIT_DISABLE,
+		       qm->io_base + QM_RAS_NFE_ENABLE);
+		writel(QM_ECC_MBIT, qm->io_base + QM_ABNORMAL_INT_SET);
+	}
+}
+
 static int qm_set_msi(struct hisi_qm *qm, bool set)
 {
 	struct pci_dev *pdev = qm->pdev;
@@ -3433,6 +3454,8 @@ static int qm_controller_reset_prepare(struct hisi_qm *qm)
 		return ret;
 	}
 
+	qm_dev_ecc_mbit_handle(qm);
+
 	if (qm->vfs_num) {
 		ret = qm_vf_reset_prepare(qm, QM_SOFT_RESET);
 		if (ret) {
@@ -3450,27 +3473,6 @@ static int qm_controller_reset_prepare(struct hisi_qm *qm)
 	return 0;
 }
 
-static void qm_dev_ecc_mbit_handle(struct hisi_qm *qm)
-{
-	u32 nfe_enb = 0;
-
-	if (!qm->err_status.is_dev_ecc_mbit &&
-	    qm->err_status.is_qm_ecc_mbit &&
-	    qm->err_ini->close_axi_master_ooo) {
-
-		qm->err_ini->close_axi_master_ooo(qm);
-
-	} else if (qm->err_status.is_dev_ecc_mbit &&
-		   !qm->err_status.is_qm_ecc_mbit &&
-		   !qm->err_ini->close_axi_master_ooo) {
-
-		nfe_enb = readl(qm->io_base + QM_RAS_NFE_ENABLE);
-		writel(nfe_enb & QM_RAS_NFE_MBIT_DISABLE,
-		       qm->io_base + QM_RAS_NFE_ENABLE);
-		writel(QM_ECC_MBIT, qm->io_base + QM_ABNORMAL_INT_SET);
-	}
-}
-
 static int qm_soft_reset(struct hisi_qm *qm)
 {
 	struct pci_dev *pdev = qm->pdev;
@@ -3496,8 +3498,6 @@ static int qm_soft_reset(struct hisi_qm *qm)
 		return ret;
 	}
 
-	qm_dev_ecc_mbit_handle(qm);
-
 	/* OOO register set and check */
 	writel(ACC_MASTER_GLOBAL_CTRL_SHUTDOWN,
 	       qm->io_base + ACC_MASTER_GLOBAL_CTRL);
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH 5.10] crypto: hisilicon/qm - inject error before stopping queue
  2025-03-07  8:42 [PATCH 5.10] crypto: hisilicon/qm - inject error before stopping queue Xiangyu Chen
@ 2025-03-10  2:14 ` Sasha Levin
  0 siblings, 0 replies; 2+ messages in thread
From: Sasha Levin @ 2025-03-10  2:14 UTC (permalink / raw)
  To: stable; +Cc: Xiangyu Chen, Sasha Levin

[ Sasha's backport helper bot ]

Hi,

✅ All tests passed successfully. No issues detected.
No action required from the submitter.

The upstream commit SHA1 provided is correct: b04f06fc0243600665b3b50253869533b7938468

WARNING: Author mismatch between patch and upstream commit:
Backport author: Xiangyu Chen<xiangyu.chen@eng.windriver.com>
Commit author: Weili Qian<qianweili@huawei.com>

Status in newer kernel trees:
6.13.y | Present (exact SHA1)
6.12.y | Present (exact SHA1)
6.6.y | Present (different SHA1: aa3e0db35a60)
6.1.y | Present (different SHA1: 98d3be34c915)
5.15.y | Present (different SHA1: 801d64177faa)
5.4.y | Not found

Note: The patch differs from the upstream commit:
---
1:  b04f06fc02436 ! 1:  d6e21dbc7d6aa crypto: hisilicon/qm - inject error before stopping queue
    @@ Metadata
      ## Commit message ##
         crypto: hisilicon/qm - inject error before stopping queue
     
    +    commit b04f06fc0243600665b3b50253869533b7938468 upstream.
    +
         The master ooo cannot be completely closed when the
         accelerator core reports memory error. Therefore, the driver
         needs to inject the qm error to close the master ooo. Currently,
    @@ Commit message
         Fixes: 6c6dd5802c2d ("crypto: hisilicon/qm - add controller reset interface")
         Signed-off-by: Weili Qian <qianweili@huawei.com>
         Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
    +    Signed-off-by: Xiangyu Chen <xiangyu.chen@windriver.com>
    +    Signed-off-by: He Zhe <zhe.he@windriver.com>
     
      ## drivers/crypto/hisilicon/qm.c ##
     @@ drivers/crypto/hisilicon/qm.c: static int qm_set_vf_mse(struct hisi_qm *qm, bool set)
    @@ drivers/crypto/hisilicon/qm.c: static int qm_set_vf_mse(struct hisi_qm *qm, bool
     +{
     +	u32 nfe_enb = 0;
     +
    -+	/* Kunpeng930 hardware automatically close master ooo when NFE occurs */
    -+	if (qm->ver >= QM_HW_V3)
    -+		return;
    -+
     +	if (!qm->err_status.is_dev_ecc_mbit &&
     +	    qm->err_status.is_qm_ecc_mbit &&
     +	    qm->err_ini->close_axi_master_ooo) {
    ++
     +		qm->err_ini->close_axi_master_ooo(qm);
    ++
     +	} else if (qm->err_status.is_dev_ecc_mbit &&
     +		   !qm->err_status.is_qm_ecc_mbit &&
     +		   !qm->err_ini->close_axi_master_ooo) {
    ++
     +		nfe_enb = readl(qm->io_base + QM_RAS_NFE_ENABLE);
     +		writel(nfe_enb & QM_RAS_NFE_MBIT_DISABLE,
     +		       qm->io_base + QM_RAS_NFE_ENABLE);
    @@ drivers/crypto/hisilicon/qm.c: static int qm_set_vf_mse(struct hisi_qm *qm, bool
     +	}
     +}
     +
    - static int qm_vf_reset_prepare(struct hisi_qm *qm,
    - 			       enum qm_stop_reason stop_reason)
    + static int qm_set_msi(struct hisi_qm *qm, bool set)
      {
    + 	struct pci_dev *pdev = qm->pdev;
     @@ drivers/crypto/hisilicon/qm.c: static int qm_controller_reset_prepare(struct hisi_qm *qm)
      		return ret;
      	}
      
     +	qm_dev_ecc_mbit_handle(qm);
     +
    - 	/* PF obtains the information of VF by querying the register. */
    - 	qm_cmd_uninit(qm);
    - 
    -@@ drivers/crypto/hisilicon/qm.c: static int qm_master_ooo_check(struct hisi_qm *qm)
    - 	return ret;
    + 	if (qm->vfs_num) {
    + 		ret = qm_vf_reset_prepare(qm, QM_SOFT_RESET);
    + 		if (ret) {
    +@@ drivers/crypto/hisilicon/qm.c: static int qm_controller_reset_prepare(struct hisi_qm *qm)
    + 	return 0;
      }
      
     -static void qm_dev_ecc_mbit_handle(struct hisi_qm *qm)
     -{
     -	u32 nfe_enb = 0;
     -
    --	/* Kunpeng930 hardware automatically close master ooo when NFE occurs */
    --	if (qm->ver >= QM_HW_V3)
    --		return;
    --
     -	if (!qm->err_status.is_dev_ecc_mbit &&
     -	    qm->err_status.is_qm_ecc_mbit &&
     -	    qm->err_ini->close_axi_master_ooo) {
    +-
     -		qm->err_ini->close_axi_master_ooo(qm);
    +-
     -	} else if (qm->err_status.is_dev_ecc_mbit &&
     -		   !qm->err_status.is_qm_ecc_mbit &&
     -		   !qm->err_ini->close_axi_master_ooo) {
    +-
     -		nfe_enb = readl(qm->io_base + QM_RAS_NFE_ENABLE);
     -		writel(nfe_enb & QM_RAS_NFE_MBIT_DISABLE,
     -		       qm->io_base + QM_RAS_NFE_ENABLE);
    @@ drivers/crypto/hisilicon/qm.c: static int qm_master_ooo_check(struct hisi_qm *qm
     -	}
     -}
     -
    - static int qm_soft_reset_prepare(struct hisi_qm *qm)
    + static int qm_soft_reset(struct hisi_qm *qm)
      {
      	struct pci_dev *pdev = qm->pdev;
    -@@ drivers/crypto/hisilicon/qm.c: static int qm_soft_reset_prepare(struct hisi_qm *qm)
    +@@ drivers/crypto/hisilicon/qm.c: static int qm_soft_reset(struct hisi_qm *qm)
      		return ret;
      	}
      
     -	qm_dev_ecc_mbit_handle(qm);
    - 	ret = qm_master_ooo_check(qm);
    - 	if (ret)
    - 		return ret;
    +-
    + 	/* OOO register set and check */
    + 	writel(ACC_MASTER_GLOBAL_CTRL_SHUTDOWN,
    + 	       qm->io_base + ACC_MASTER_GLOBAL_CTRL);
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-5.10.y       |  Success    |  Success   |

^ permalink raw reply	[flat|nested] 2+ messages in thread

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