From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF4861AAA0F; Tue, 8 Apr 2025 11:47:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744112857; cv=none; b=F6HexCX9qYrNO42jPkrNX1mXXP+bmCd8lWW+1iZvtvLqSiPOQH94o9AxY4WdOT0EBA4D3IETTBfRs5QybZuP2O0AGs4ngRGtqNvC9bcxQrU5kvb2bZDA2ZhtWRqAyBcF6xRKfBnq646KTswx+eu8v1BoQEzfep17T4qvtbek+P8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744112857; c=relaxed/simple; bh=5OhshkTUY5Vi2I5nQPYp2+N1ar3MIAz7aF76NaJz/58=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Gn7UZoGbGN2ZDfxACdkcIStW5DFxsze8J+L75XQHT8+AZrjCHj9hgxkoUQ6XZk6+fwdfdjIEMmaj5bAKpsk2LzFwjjlpHpFOPRh6V3HXoNRhoKfZ/xwOJWfR/xRqh1j7767KVlLY/T4qEvTqbiAgsxlPGkXRziLjefNNNULf/Dg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=DVcZyz/A; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="DVcZyz/A" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6FB36C4CEE5; Tue, 8 Apr 2025 11:47:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1744112856; bh=5OhshkTUY5Vi2I5nQPYp2+N1ar3MIAz7aF76NaJz/58=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DVcZyz/A3EvNxnMnua73vZ3DZMXB9AC7+M9hSfplBs67uA1i9pH+3311kdC+mHcHq +df0xFatjUJmqxkb7pW2WV/IjFawacKggcKsCows9BJ2iT48MtdFz7MD60X1+UcE8f wYM0ggZ/J0hpxdf0XzNUiYcnE68Vc3pE2tSGg1TA= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Icenowy Zheng , Keith Busch , Sasha Levin Subject: [PATCH 5.15 224/279] nvme-pci: skip CMB blocks incompatible with PCI P2P DMA Date: Tue, 8 Apr 2025 12:50:07 +0200 Message-ID: <20250408104832.415820542@linuxfoundation.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250408104826.319283234@linuxfoundation.org> References: <20250408104826.319283234@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Icenowy Zheng [ Upstream commit 56cf7ef0d490b28fad8f8629fc135c5ab7c9f54e ] The PCI P2PDMA code will register the CMB block to the memory hot-plugging subsystem, which have an alignment requirement. Memory blocks that do not satisfy this alignment requirement (usually 2MB) will lead to a WARNING from memory hotplugging. Verify the CMB block's address and size against the alignment and only try to send CMB blocks compatible with it to prevent this warning. Tested on Intel DC D4502 SSD, which has a 512K CMB block that is too small for memory hotplugging (thus PCI P2PDMA). Signed-off-by: Icenowy Zheng Signed-off-by: Keith Busch Signed-off-by: Sasha Levin --- drivers/nvme/host/pci.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index 39df3ac10a21f..a3c5af95e8f3e 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -1849,6 +1849,18 @@ static void nvme_map_cmb(struct nvme_dev *dev) if (offset > bar_size) return; + /* + * Controllers may support a CMB size larger than their BAR, for + * example, due to being behind a bridge. Reduce the CMB to the + * reported size of the BAR + */ + size = min(size, bar_size - offset); + + if (!IS_ALIGNED(size, memremap_compat_align()) || + !IS_ALIGNED(pci_resource_start(pdev, bar), + memremap_compat_align())) + return; + /* * Tell the controller about the host side address mapping the CMB, * and enable CMB decoding for the NVMe 1.4+ scheme: @@ -1859,14 +1871,6 @@ static void nvme_map_cmb(struct nvme_dev *dev) dev->bar + NVME_REG_CMBMSC); } - /* - * Controllers may support a CMB size larger than their BAR, - * for example, due to being behind a bridge. Reduce the CMB to - * the reported size of the BAR - */ - if (size > bar_size - offset) - size = bar_size - offset; - if (pci_p2pdma_add_resource(pdev, bar, size, offset)) { dev_warn(dev->ctrl.device, "failed to register the CMB\n"); -- 2.39.5