From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F0AC263C7B; Thu, 17 Apr 2025 18:33:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744914809; cv=none; b=NZR93j4kIb3omIgMJriwbIticxdtiJsyt+ihMOScDMhvU7KfedP3bc6RxZ4stBQhM+QHVE+t3KLNnwODbDQf/Vz4Vi9cpWq0/yty84N4cDLIU2G/fjLfnWI2AjzI5ZxozT9yy1KIrDKv2Eh7wLnW1O+h+moYlFVe6BKJWpEBCEU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744914809; c=relaxed/simple; bh=Km2icXNqXx7o4xq6KE28SzZPWTGc5lNPBFy4x6Ap7EU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nDDtMrCO9VOWLoEo5WfDgXls8RWZOJYZXUSI4Cry+dXQi3kRu6l0jKVURIuvfdzb6nD9SSvevB2GWbxn6aTOCZIsgeC6OoYAk6VxoPjM9+VH3DCiY7Gwy9wClseyQ5ifGC7FVBxKHfBcGPIdrfSoy8i7aYUwt06XD7v+tsugDks= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=cQnCTOcd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="cQnCTOcd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DD737C4CEE4; Thu, 17 Apr 2025 18:33:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1744914809; bh=Km2icXNqXx7o4xq6KE28SzZPWTGc5lNPBFy4x6Ap7EU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cQnCTOcd/YdhA4019iU8AxnJ8X761CfmfDxs1MzpLdZerZladc00/U9sg7AbYDpds SL5L9PGa8W9phwB2xU/cfSFErqMB/kKs7yD6yNjRaLUuUIUxy052BIc0XIACLPuIqu eWCaE+aKc4miOtN6wKNdiSbz2WRgVHNufywT8eRk= From: Greg Kroah-Hartman To: stable@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Peter Griffin , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com, Krzysztof Kozlowski Subject: [PATCH 6.13 310/414] arm64: dts: exynos: gs101: disable pinctrl_gsacore node Date: Thu, 17 Apr 2025 19:51:08 +0200 Message-ID: <20250417175123.902965434@linuxfoundation.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250417175111.386381660@linuxfoundation.org> References: <20250417175111.386381660@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.13-stable review patch. If anyone has any objections, please let me know. ------------------ From: Peter Griffin commit 168e24966f10ff635b0ec9728aa71833bf850ee5 upstream. gsacore registers are not accessible from normal world. Disable this node, so that the suspend/resume callbacks in the pinctrl driver don't cause a Serror attempting to access the registers. Fixes: ea89fdf24fd9 ("arm64: dts: exynos: google: Add initial Google gs101 SoC support") Signed-off-by: Peter Griffin To: Rob Herring To: Krzysztof Kozlowski To: Conor Dooley To: Alim Akhtar Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: tudor.ambarus@linaro.org Cc: andre.draszik@linaro.org Cc: kernel-team@android.com Cc: willmcvicker@google.com Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250106-contrib-pg-pinctrl_gsacore_disable-v1-1-d3fc88a48aed@linaro.org Signed-off-by: Krzysztof Kozlowski Signed-off-by: Greg Kroah-Hartman --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 + 1 file changed, 1 insertion(+) --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1451,6 +1451,7 @@ /* TODO: update once support for this CMU exists */ clocks = <0>; clock-names = "pclk"; + status = "disabled"; }; cmu_top: clock-controller@1e080000 {