From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 437662C09EC; Tue, 29 Apr 2025 23:52:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745970766; cv=none; b=f1ybALmiKtUJEPT07SK5p+puNHpioUF4k8H+n7kQEGaZKM5YI2Vk/q/POXEm4GctVcIcazCefW9mLz/Kv3dmVjkeoOmnn3cqZFcNfSChA8j1JJYXDlGPzrHmy8HVZGIgE3BcK1EARG+UoQtjG8r9fKSyh0ZP6cxrKno1h4+/J60= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745970766; c=relaxed/simple; bh=s4PkGTABFyWDXoM0sBeHLE45k4zIvDOenR7uAJHfIQ8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jreZwwhAp698cnIXz6L98/UeIMKFLgbgzInvjMWTghG8PmgRvLsJyFvl+adfc5NOEBxLx+HSnGsksC9ff2QNX+5tKWBhLXXKvM+9k7uIKpqfbZlFUxRfRw17E1w5VvumUIzenCNK0xjkt3GzDcWKdF3W6xb8G/7awkVFvOdu4+c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fy7b8esV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fy7b8esV" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3AAC5C4CEEB; Tue, 29 Apr 2025 23:52:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1745970766; bh=s4PkGTABFyWDXoM0sBeHLE45k4zIvDOenR7uAJHfIQ8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fy7b8esVBOqi1MGqyIO1c/VWfkhY3vJ5f6We/YsC1nNmzZRaYGrfqSotl0tz618lq VeTHOnMBgYJ4cvHxI8V6ZD8Vzg2oED3RWDFdJY4B2N+j1oLO30+cl2WkcC1QhPFmE1 QsAJbB6mA0YZHUROBmqEAu9rLzxjLWPABNteQ28ggS5482/CvI84mZlmwbZ0OdVrqZ CTsf8YyaIPxSahWX11aBJpCOgKZlkI+HHGtX8c10i6IfxcKPM7V06YxNTMzNM7hB4A V3GDMswe76ojhIoBcDPzxJ7EIxmME7/GYUF4iYGhwLSIyvIrTy/w2BkOSCnbyYOAA3 gf8h859Ild/Jw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Dmitry Baryshkov , Srinivas Kandagatla , Greg Kroah-Hartman , Sasha Levin , srini@kernel.org Subject: [PATCH AUTOSEL 6.6 06/21] nvmem: qfprom: switch to 4-byte aligned reads Date: Tue, 29 Apr 2025 19:52:18 -0400 Message-Id: <20250429235233.537828-6-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250429235233.537828-1-sashal@kernel.org> References: <20250429235233.537828-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.6.88 Content-Transfer-Encoding: 8bit From: Dmitry Baryshkov [ Upstream commit 3566a737db87a9bf360c2fd36433c5149f805f2e ] All platforms since Snapdragon 8 Gen1 (SM8450) require using 4-byte reads to access QFPROM data. While older platforms were more than happy with 1-byte reads, change the qfprom driver to use 4-byte reads for all the platforms. Specify stride and word size of 4 bytes. To retain compatibility with the existing DT and to simplify porting data from vendor kernels, use fixup_dt_cell_info in order to bump alignment requirements. Signed-off-by: Dmitry Baryshkov Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20250411112251.68002-12-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin --- drivers/nvmem/qfprom.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c index 6c554040c6e67..7b0621fdbc82e 100644 --- a/drivers/nvmem/qfprom.c +++ b/drivers/nvmem/qfprom.c @@ -321,19 +321,32 @@ static int qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes) { struct qfprom_priv *priv = context; - u8 *val = _val; - int i = 0, words = bytes; + u32 *val = _val; void __iomem *base = priv->qfpcorrected; + int words = DIV_ROUND_UP(bytes, sizeof(u32)); + int i; if (read_raw_data && priv->qfpraw) base = priv->qfpraw; - while (words--) - *val++ = readb(base + reg + i++); + for (i = 0; i < words; i++) + *val++ = readl(base + reg + i * sizeof(u32)); return 0; } +/* Align reads to word boundary */ +static void qfprom_fixup_dt_cell_info(struct nvmem_device *nvmem, + struct nvmem_cell_info *cell) +{ + unsigned int byte_offset = cell->offset % sizeof(u32); + + cell->bit_offset += byte_offset * BITS_PER_BYTE; + cell->offset -= byte_offset; + if (byte_offset && !cell->nbits) + cell->nbits = cell->bytes * BITS_PER_BYTE; +} + static void qfprom_runtime_disable(void *data) { pm_runtime_disable(data); @@ -358,10 +371,11 @@ static int qfprom_probe(struct platform_device *pdev) struct nvmem_config econfig = { .name = "qfprom", .add_legacy_fixed_of_cells = true, - .stride = 1, - .word_size = 1, + .stride = 4, + .word_size = 4, .id = NVMEM_DEVID_AUTO, .reg_read = qfprom_reg_read, + .fixup_dt_cell_info = qfprom_fixup_dt_cell_info, }; struct device *dev = &pdev->dev; struct resource *res; -- 2.39.5