From: Sasha Levin <sashal@kernel.org>
To: stable@vger.kernel.org
Cc: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Sasha Levin <sashal@kernel.org>
Subject: Re: [PATCH 5.15 v2 10/14] x86/its: Add support for ITS-safe return thunk
Date: Wed, 14 May 2025 16:13:45 -0400 [thread overview]
Message-ID: <20250514112807-2257c01777a0878a@stable.kernel.org> (raw)
In-Reply-To: <20250513-its-5-15-v2-10-90690efdc7e0@linux.intel.com>
[ Sasha's backport helper bot ]
Hi,
✅ All tests passed successfully. No issues detected.
No action required from the submitter.
The upstream commit SHA1 provided is correct: a75bf27fe41abe658c53276a0c486c4bf9adecfc
Status in newer kernel trees:
6.14.y | Present (different SHA1: 308cb38001dc)
6.12.y | Present (different SHA1: 09f29041465a)
6.6.y | Present (different SHA1: 16103770be91)
6.1.y | Present (different SHA1: eb5018752a74)
Note: The patch differs from the upstream commit:
---
1: a75bf27fe41ab ! 1: 7254fab50b115 x86/its: Add support for ITS-safe return thunk
@@ Metadata
## Commit message ##
x86/its: Add support for ITS-safe return thunk
+ commit a75bf27fe41abe658c53276a0c486c4bf9adecfc upstream.
+
RETs in the lower half of cacheline may be affected by ITS bug,
specifically when the RSB-underflows. Use ITS-safe return thunk for such
RETs.
@@ Commit message
- RET in retpoline sequence does not need to be patched, because the
sequence itself fills an RSB before RET.
- - RET in Call Depth Tracking (CDT) thunks __x86_indirect_{call|jump}_thunk
- and call_depth_return_thunk are not patched because CDT by design
- prevents RSB-underflow.
- RETs in .init section are not reachable after init.
- RETs that are explicitly marked safe with ANNOTATE_UNRET_SAFE.
@@ Commit message
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
## arch/x86/include/asm/alternative.h ##
-@@ arch/x86/include/asm/alternative.h: static __always_inline int x86_call_depth_emit_accounting(u8 **pprog,
- }
- #endif
+@@ arch/x86/include/asm/alternative.h: extern void apply_returns(s32 *start, s32 *end);
+
+ struct module;
-+#if defined(CONFIG_MITIGATION_RETHUNK) && defined(CONFIG_OBJTOOL)
++#ifdef CONFIG_RETHUNK
+extern bool cpu_wants_rethunk(void);
+extern bool cpu_wants_rethunk_at(void *addr);
+#else
@@ arch/x86/include/asm/alternative.h: static __always_inline int x86_call_depth_em
void *locks, void *locks_end,
## arch/x86/include/asm/nospec-branch.h ##
-@@ arch/x86/include/asm/nospec-branch.h: static inline void srso_return_thunk(void) {}
- static inline void srso_alias_return_thunk(void) {}
+@@ arch/x86/include/asm/nospec-branch.h: extern void __x86_return_thunk(void);
+ static inline void __x86_return_thunk(void) {}
#endif
+#ifdef CONFIG_MITIGATION_ITS
@@ arch/x86/include/asm/nospec-branch.h: static inline void srso_return_thunk(void)
## arch/x86/kernel/alternative.c ##
@@ arch/x86/kernel/alternative.c: void __init_or_module noinline apply_retpolines(s32 *start, s32 *end)
- #ifdef CONFIG_MITIGATION_RETHUNK
+ #ifdef CONFIG_RETHUNK
+bool cpu_wants_rethunk(void)
+{
@@ arch/x86/kernel/alternative.c: static int patch_return(void *addr, struct insn *
i = JMP32_INSN_SIZE;
__text_gen_insn(bytes, JMP32_INSN_OPCODE, addr, x86_return_thunk, i);
} else {
-@@ arch/x86/kernel/alternative.c: void __init_or_module noinline apply_returns(s32 *start, s32 *end)
- {
- s32 *s;
-
-- if (cpu_feature_enabled(X86_FEATURE_RETHUNK))
-+ if (cpu_wants_rethunk())
- static_call_force_reinit();
-
- for (s = start; s < end; s++) {
## arch/x86/kernel/ftrace.c ##
@@ arch/x86/kernel/ftrace.c: create_trampoline(struct ftrace_ops *ops, unsigned int *tramp_size)
@@ arch/x86/kernel/static_call.c: static void __ref __static_call_transform(void *i
code = text_gen_insn(JMP32_INSN_OPCODE, insn, x86_return_thunk);
else
code = &retinsn;
-@@ arch/x86/kernel/static_call.c: static void __ref __static_call_transform(void *insn, enum insn_type type,
- case JCC:
- if (!func) {
- func = __static_call_return;
-- if (cpu_feature_enabled(X86_FEATURE_RETHUNK))
-+ if (cpu_wants_rethunk())
- func = x86_return_thunk;
- }
-
## arch/x86/kernel/vmlinux.lds.S ##
-@@ arch/x86/kernel/vmlinux.lds.S: PROVIDE(__ref_stack_chk_guard = __stack_chk_guard);
+@@ arch/x86/kernel/vmlinux.lds.S: INIT_PER_CPU(irq_stack_backing_store);
. = ASSERT(__x86_indirect_its_thunk_array == __x86_indirect_its_thunk_rax, "Gap in ITS thunk array");
#endif
@@ arch/x86/kernel/vmlinux.lds.S: PROVIDE(__ref_stack_chk_guard = __stack_chk_guard
+
#endif /* CONFIG_X86_64 */
- /*
+ #ifdef CONFIG_KEXEC_CORE
## arch/x86/lib/retpoline.S ##
@@ arch/x86/lib/retpoline.S: SYM_CODE_START(__x86_indirect_its_thunk_array)
@@ arch/x86/lib/retpoline.S: SYM_CODE_START(__x86_indirect_its_thunk_array)
+
+#endif /* CONFIG_MITIGATION_ITS */
- /*
- * This function name is magical and is used by -mfunction-return=thunk-extern
+ SYM_CODE_START(__x86_return_thunk)
+ UNWIND_HINT_FUNC
## arch/x86/net/bpf_jit_comp.c ##
@@ arch/x86/net/bpf_jit_comp.c: static void emit_return(u8 **pprog, u8 *ip)
---
Results of testing on various branches:
| Branch | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-6.1.y | Success | Success |
next prev parent reply other threads:[~2025-05-14 20:13 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-14 6:06 [PATCH 5.15 v2 00/14] ITS mitigation Pawan Gupta
2025-05-14 6:06 ` [PATCH 5.15 v2 01/14] x86,nospec: Simplify {JMP,CALL}_NOSPEC Pawan Gupta
2025-05-14 20:13 ` Sasha Levin
2025-05-14 6:07 ` [PATCH 5.15 v2 02/14] x86/speculation: Simplify and make CALL_NOSPEC consistent Pawan Gupta
2025-05-14 20:14 ` Sasha Levin
2025-05-14 6:07 ` [PATCH 5.15 v2 03/14] x86/speculation: Add a conditional CS prefix to CALL_NOSPEC Pawan Gupta
2025-05-14 20:14 ` Sasha Levin
2025-05-14 6:07 ` [PATCH 5.15 v2 04/14] x86/speculation: Remove the extra #ifdef around CALL_NOSPEC Pawan Gupta
2025-05-14 20:13 ` Sasha Levin
2025-05-14 6:07 ` [PATCH 5.15 v2 05/14] Documentation: x86/bugs/its: Add ITS documentation Pawan Gupta
2025-05-14 20:14 ` Sasha Levin
2025-05-14 6:08 ` [PATCH 5.15 v2 06/14] x86/its: Enumerate Indirect Target Selection (ITS) bug Pawan Gupta
2025-05-14 20:13 ` Sasha Levin
2025-05-14 6:08 ` [PATCH 5.15 v2 07/14] x86/its: Add support for ITS-safe indirect thunk Pawan Gupta
2025-05-14 20:14 ` Sasha Levin
2025-05-14 6:08 ` [PATCH 5.15 v2 08/14] x86/alternative: Optimize returns patching Pawan Gupta
2025-05-14 20:14 ` Sasha Levin
2025-05-14 6:08 ` [PATCH 5.15 v2 09/14] x86/alternatives: Remove faulty optimization Pawan Gupta
2025-05-14 20:13 ` Sasha Levin
2025-05-14 6:09 ` [PATCH 5.15 v2 10/14] x86/its: Add support for ITS-safe return thunk Pawan Gupta
2025-05-14 20:13 ` Sasha Levin [this message]
2025-05-14 6:09 ` [PATCH 5.15 v2 11/14] x86/its: Enable Indirect Target Selection mitigation Pawan Gupta
2025-05-14 20:14 ` Sasha Levin
2025-05-14 6:09 ` [PATCH 5.15 v2 12/14] x86/its: Add "vmexit" option to skip mitigation on some CPUs Pawan Gupta
2025-05-14 20:14 ` Sasha Levin
2025-05-14 6:10 ` [PATCH 5.15 v2 13/14] x86/its: Align RETs in BHB clear sequence to avoid thunking Pawan Gupta
2025-05-14 20:13 ` Sasha Levin
2025-05-14 6:10 ` [PATCH 5.15 v2 14/14] x86/its: Use dynamic thunks for indirect branches Pawan Gupta
2025-05-14 20:14 ` Sasha Levin
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