From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04F992576; Mon, 2 Jun 2025 14:48:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748875687; cv=none; b=dqgnoM3Y0nRoG4gCcu+eXK5QXQtupd2tYX055u27DaTht1USH/PHAz5EVV6dC+nAsT45NQKlbdonlPLVu1kxZbiVnU56M3Zl8m+RoDDoeXsDqgbHkZDjG4IW5E8yqvr6hFPitxD7tOcGlWjmifN/HHStwSqJFeTT3PfqZzwROIY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748875687; c=relaxed/simple; bh=YXb4IKW4lKuxWy9SPvCV2d/N5BepA67gP9GJqJcN3rs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QyNjCcsQMJiRheQSXSV92ANs2uLQrnYbgixhF1R+ZcolL3tTwSzs0v6/G6VGv/687jwL/F2CMxh6CowVsSQm1DZjJdRGcn61Q5+b9gL3Iw+HB9R7CXABgB4lV0HbeaYBFHRUdbPZkuJXc1L3vxfdDjrGhICBAkdxCGtpJye8oPE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=nYCW61fu; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="nYCW61fu" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6629FC4CEEE; Mon, 2 Jun 2025 14:48:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1748875686; bh=YXb4IKW4lKuxWy9SPvCV2d/N5BepA67gP9GJqJcN3rs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nYCW61fuQIaXUH0BQE9JsxX7lOGxzzjDRUnJjJbWRCmzABG7+dzXyi9+G4uqD1D1j 8aK8ZuJ3UFqumlRBTqr9yrxKtxND4EVs3kAbLjEYozV0+u7KfEj7GP6mZpngYxT5ZI fle0iVG3PGvfprfMQIJISPT3cqUBaiqvja1rOcR8= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Bitterblue Smith , Ping-Ke Shih , Sasha Levin Subject: [PATCH 5.10 212/270] wifi: rtw88: Fix download_firmware_validate() for RTL8814AU Date: Mon, 2 Jun 2025 15:48:17 +0200 Message-ID: <20250602134315.849723766@linuxfoundation.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250602134307.195171844@linuxfoundation.org> References: <20250602134307.195171844@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Bitterblue Smith [ Upstream commit 9e8243025cc06abc975c876dffda052073207ab3 ] After the firmware is uploaded, download_firmware_validate() checks some bits in REG_MCUFW_CTRL to see if everything went okay. The RTL8814AU power on sequence sets bits 13 and 12 to 2, which this function does not expect, so it thinks the firmware upload failed. Make download_firmware_validate() ignore bits 13 and 12. Signed-off-by: Bitterblue Smith Acked-by: Ping-Ke Shih Signed-off-by: Ping-Ke Shih Link: https://patch.msgid.link/049d2887-22fc-47b7-9e59-62627cb525f8@gmail.com Signed-off-by: Sasha Levin --- drivers/net/wireless/realtek/rtw88/reg.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtw88/reg.h b/drivers/net/wireless/realtek/rtw88/reg.h index 9088bfb2a3157..27de6eeb4ad68 100644 --- a/drivers/net/wireless/realtek/rtw88/reg.h +++ b/drivers/net/wireless/realtek/rtw88/reg.h @@ -107,6 +107,7 @@ #define BIT_SHIFT_ROM_PGE 16 #define BIT_FW_INIT_RDY BIT(15) #define BIT_FW_DW_RDY BIT(14) +#define BIT_CPU_CLK_SEL (BIT(12) | BIT(13)) #define BIT_RPWM_TOGGLE BIT(7) #define BIT_RAM_DL_SEL BIT(7) /* legacy only */ #define BIT_DMEM_CHKSUM_OK BIT(6) @@ -124,7 +125,7 @@ BIT_CHECK_SUM_OK) #define FW_READY_LEGACY (BIT_MCUFWDL_RDY | BIT_FWDL_CHK_RPT | \ BIT_WINTINI_RDY | BIT_RAM_DL_SEL) -#define FW_READY_MASK 0xffff +#define FW_READY_MASK (0xffff & ~BIT_CPU_CLK_SEL) #define REG_MCU_TST_CFG 0x84 #define VAL_FW_TRIGGER 0x1 -- 2.39.5