Re: [PATCH 5.10 09/14] arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays

[Sasha Levin <sashal@kernel.org>]

[ Sasha's backport helper bot ]

Hi,

✅ All tests passed successfully. No issues detected.
No action required from the submitter.

The upstream commit SHA1 provided is correct: fee4d171451c1ad9e8aaf65fc0ab7d143a33bd72

WARNING: Author mismatch between patch and upstream commit:
Backport author: Pu Lehui<pulehui@huaweicloud.com>
Commit author: Will Deacon<will@kernel.org>

Status in newer kernel trees:
6.15.y | Present (exact SHA1)
6.14.y | Present (different SHA1: 333579202f09)
6.12.y | Present (different SHA1: 090c8714efe1)
6.6.y | Present (different SHA1: 3821cae9bd5a)
6.1.y | Present (different SHA1: 446289b8b36b)
5.15.y | Present (different SHA1: 6266b3509b2c)

Note: The patch differs from the upstream commit:
---
1:  fee4d171451c1 ! 1:  0334c29ef604d arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays
    @@ Metadata
      ## Commit message ##
         arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays
     
    +    [ Upstream commit fee4d171451c1ad9e8aaf65fc0ab7d143a33bd72 ]
    +
         Commit a5951389e58d ("arm64: errata: Add newer ARM cores to the
         spectre_bhb_loop_affected() lists") added some additional CPUs to the
         Spectre-BHB workaround, including some new arrays for designs that
    @@ Commit message
         Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
         Link: https://lore.kernel.org/r/20250501104747.28431-1-will@kernel.org
         Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
    +    Signed-off-by: Pu Lehui <pulehui@huawei.com>
     
      ## arch/arm64/kernel/proton-pack.c ##
     @@ arch/arm64/kernel/proton-pack.c: static u8 spectre_bhb_loop_affected(void)
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-5.15.y       |  Success    |  Success   |