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From: Sasha Levin <sashal@kernel.org>
To: stable@vger.kernel.org
Cc: Pu Lehui <pulehui@huaweicloud.com>, Sasha Levin <sashal@kernel.org>
Subject: Re: [PATCH 5.10 12/14] arm64: bpf: Add BHB mitigation to the epilogue for cBPF programs
Date: Sun,  8 Jun 2025 22:34:57 -0400	[thread overview]
Message-ID: <20250608202626-b032632786bcf82b@stable.kernel.org> (raw)
In-Reply-To: <20250607152521.2828291-13-pulehui@huaweicloud.com>

[ Sasha's backport helper bot ]

Hi,

✅ All tests passed successfully. No issues detected.
No action required from the submitter.

The upstream commit SHA1 provided is correct: 0dfefc2ea2f29ced2416017d7e5b1253a54c2735

WARNING: Author mismatch between patch and upstream commit:
Backport author: Pu Lehui<pulehui@huaweicloud.com>
Commit author: James Morse<james.morse@arm.com>

Status in newer kernel trees:
6.15.y | Present (exact SHA1)
6.14.y | Present (different SHA1: 852b8ae934b5)
6.12.y | Present (different SHA1: 38c345fd54af)
6.6.y | Present (different SHA1: 42a20cf51011)
6.1.y | Present (different SHA1: 8fe5c37b0e08)
5.15.y | Not found

Note: The patch differs from the upstream commit:
---
1:  0dfefc2ea2f29 ! 1:  450e9a287d5b4 arm64: bpf: Add BHB mitigation to the epilogue for cBPF programs
    @@ Metadata
      ## Commit message ##
         arm64: bpf: Add BHB mitigation to the epilogue for cBPF programs
     
    +    [ Upstream commit 0dfefc2ea2f29ced2416017d7e5b1253a54c2735 ]
    +
         A malicious BPF program may manipulate the branch history to influence
         what the hardware speculates will happen next.
     
    @@ Commit message
         Signed-off-by: James Morse <james.morse@arm.com>
         Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
         Acked-by: Daniel Borkmann <daniel@iogearbox.net>
    +    Signed-off-by: Pu Lehui <pulehui@huawei.com>
     
      ## arch/arm64/include/asm/spectre.h ##
    -@@ arch/arm64/include/asm/spectre.h: enum mitigation_state arm64_get_meltdown_state(void);
    +@@ arch/arm64/include/asm/spectre.h: void spectre_v4_enable_task_mitigation(struct task_struct *tsk);
      
      enum mitigation_state arm64_get_spectre_bhb_state(void);
      bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry, int scope);
    @@ arch/arm64/include/asm/spectre.h: enum mitigation_state arm64_get_meltdown_state
      void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
     
      ## arch/arm64/kernel/proton-pack.c ##
    -@@ arch/arm64/kernel/proton-pack.c: static void this_cpu_set_vectors(enum arm64_bp_harden_el1_vectors slot)
    - 	isb();
    - }
    +@@ arch/arm64/kernel/proton-pack.c: static void kvm_setup_bhb_slot(const char *hyp_vecs_start) { }
    + #endif /* CONFIG_KVM */
      
    + static bool spectre_bhb_fw_mitigated;
     -static bool __read_mostly __nospectre_bhb;
     +bool __read_mostly __nospectre_bhb;
      static int __init parse_spectre_bhb_param(char *str)
    @@ arch/arm64/net/bpf_jit_comp.c
     +#include <linux/arm-smccc.h>
      #include <linux/bitfield.h>
      #include <linux/bpf.h>
    ++#include <linux/cpu.h>
      #include <linux/filter.h>
    -@@
    - #include <asm/asm-extable.h>
    + #include <linux/printk.h>
    + #include <linux/slab.h>
    + 
      #include <asm/byteorder.h>
      #include <asm/cacheflush.h>
     +#include <asm/cpufeature.h>
      #include <asm/debug-monitors.h>
    - #include <asm/insn.h>
    - #include <asm/text-patching.h>
    -@@ arch/arm64/net/bpf_jit_comp.c: static void build_plt(struct jit_ctx *ctx)
    - 		plt->target = (u64)&dummy_tramp;
    + #include <asm/set_memory.h>
    + 
    +@@ arch/arm64/net/bpf_jit_comp.c: static int emit_bpf_tail_call(struct jit_ctx *ctx)
    + #undef jmp_offset
      }
      
     -static void build_epilogue(struct jit_ctx *ctx)
    @@ arch/arm64/net/bpf_jit_comp.c: static void build_plt(struct jit_ctx *ctx)
     +static void build_epilogue(struct jit_ctx *ctx, bool was_classic)
      {
      	const u8 r0 = bpf2a64[BPF_REG_0];
    - 	const u8 ptr = bpf2a64[TCCNT_PTR];
    + 	const u8 r6 = bpf2a64[BPF_REG_6];
     @@ arch/arm64/net/bpf_jit_comp.c: static void build_epilogue(struct jit_ctx *ctx)
    - 
    - 	emit(A64_POP(A64_ZR, ptr, A64_SP), ctx);
    + 	emit(A64_POP(r8, r9, A64_SP), ctx);
    + 	emit(A64_POP(r6, r7, A64_SP), ctx);
      
     +	if (was_classic)
     +		build_bhb_mitigation(ctx);
    @@ arch/arm64/net/bpf_jit_comp.c: static void build_epilogue(struct jit_ctx *ctx)
     +	/* Move the return value from bpf:r0 (aka x7) to x0 */
      	emit(A64_MOV(1, A64_R(0), r0), ctx);
      
    - 	/* Authenticate lr */
    + 	emit(A64_RET(A64_LR), ctx);
     @@ arch/arm64/net/bpf_jit_comp.c: struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
      	}
      
      	ctx.epilogue_offset = ctx.idx;
     -	build_epilogue(&ctx);
     +	build_epilogue(&ctx, was_classic);
    - 	build_plt(&ctx);
      
    - 	extable_align = __alignof__(struct exception_table_entry);
    + 	extable_size = prog->aux->num_exentries *
    + 		sizeof(struct exception_table_entry);
     @@ arch/arm64/net/bpf_jit_comp.c: struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
    - 		goto out_free_hdr;
    + 		goto out_off;
      	}
      
     -	build_epilogue(&ctx);
     +	build_epilogue(&ctx, was_classic);
    - 	build_plt(&ctx);
      
    - 	/* Extra pass to validate JITed code. */
    + 	/* 3. Extra pass to validate JITed code. */
    + 	if (validate_code(&ctx)) {
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-5.15.y       |  Success    |  Success   |

  reply	other threads:[~2025-06-09  2:34 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-07 15:25 [PATCH 5.10 00/14] backport for CVE-2025-37948 and CVE-2025-37963 Pu Lehui
2025-06-07 15:25 ` [PATCH 5.10 01/14] arm64: insn: Add barrier encodings Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 02/14] arm64: move AARCH64_BREAK_FAULT into insn-def.h Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 03/14] arm64: insn: add encoders for atomic operations Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 04/14] arm64: insn: Add support for encoding DSB Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 05/14] arm64: proton-pack: Expose whether the platform is mitigated by firmware Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 06/14] arm64: errata: Assume that unknown CPUs _are_ vulnerable to Spectre BHB Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 07/14] arm64: errata: Add KRYO 2XX/3XX/4XX silver cores to Spectre BHB safe list Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 08/14] arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 09/14] arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 10/14] arm64: proton-pack: Expose whether the branchy loop k value Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 11/14] arm64: spectre: increase parameters that can be used to turn off bhb mitigation individually Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 12/14] arm64: bpf: Add BHB mitigation to the epilogue for cBPF programs Pu Lehui
2025-06-09  2:34   ` Sasha Levin [this message]
2025-06-07 15:25 ` [PATCH 5.10 13/14] arm64: bpf: Only mitigate cBPF programs loaded by unprivileged users Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 14/14] arm64: proton-pack: Add new CPUs 'k' values for branch mitigation Pu Lehui
2025-06-09  2:34   ` Sasha Levin

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