From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C7F41E5206; Mon, 23 Jun 2025 21:58:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750715900; cv=none; b=dd3cFrHravYWwpKqcdjU6VsQqQVXLU/B+zq31Gn1SVOiAZwy7lKdvtiQQRYm/mHNEBF6Qeuh4LshAIY4KuAidpuC8TQ+NZ4Z6nbR0ZORfNK8qZptLqJmOoXz3B1g2ec+048jzCd992ck/rU9kQL2WS7WeLVq2JK8ehidVTcIi/Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750715900; c=relaxed/simple; bh=HLZ2W1wO1P9EZV0nCUvPZm8dwJqmDqyFejq55Yw/k2Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ow28e3jMkajgc5wWRz/i6GU74vfMlUjoV2PKAaOMQIjfgiiKocWnWozQJLlL7mRpWl7Z7a2ypHPmNbnwF824rb0U3YWBOoOU3cg0rrtCpRRrh7x5EuXwy/AgFR1DODlR+XYQNsWR6bTaWpc2aC8vUURqKewClhk5+YcfJlkFHIQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=RgYdTFpw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="RgYdTFpw" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CA5CCC4CEEA; Mon, 23 Jun 2025 21:58:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1750715900; bh=HLZ2W1wO1P9EZV0nCUvPZm8dwJqmDqyFejq55Yw/k2Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RgYdTFpwGy+WZKR+iXI92ilii405nSm0p3vMQ/5LlYD3U659vl1jDm/7lqyDEfdC9 iWwDSwsYK+IqsR5+qTyn8Z3JQJNmhduAjNBBBhynROYwZK0E825oSOplcXabM8roTc zQENeS8kWcxnvjr8RwJRPW7dYg+t139nLrHVRBnE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Douglas Anderson , James Morse , Catalin Marinas , Pu Lehui Subject: [PATCH 5.10 329/355] arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists Date: Mon, 23 Jun 2025 15:08:50 +0200 Message-ID: <20250623130636.638691483@linuxfoundation.org> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250623130626.716971725@linuxfoundation.org> References: <20250623130626.716971725@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Douglas Anderson [ Upstream commit a5951389e58d2e816eed3dbec5877de9327fd881 ] When comparing to the ARM list [1], it appears that several ARM cores were missing from the lists in spectre_bhb_loop_affected(). Add them. NOTE: for some of these cores it may not matter since other ways of clearing the BHB may be used (like the CLRBHB instruction or ECBHB), but it still seems good to have all the info from ARM's whitepaper included. [1] https://developer.arm.com/Arm%20Security%20Center/Spectre-BHB Fixes: 558c303c9734 ("arm64: Mitigate spectre style branch history side channels") Cc: stable@vger.kernel.org Signed-off-by: Douglas Anderson Reviewed-by: James Morse Link: https://lore.kernel.org/r/20250107120555.v4.5.I4a9a527e03f663040721c5401c41de587d015c82@changeid Signed-off-by: Catalin Marinas Signed-off-by: Pu Lehui Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kernel/proton-pack.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -884,6 +884,14 @@ static u8 spectre_bhb_loop_affected(void { u8 k = 0; + static const struct midr_range spectre_bhb_k132_list[] = { + MIDR_ALL_VERSIONS(MIDR_CORTEX_X3), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), + }; + static const struct midr_range spectre_bhb_k38_list[] = { + MIDR_ALL_VERSIONS(MIDR_CORTEX_A715), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A720), + }; static const struct midr_range spectre_bhb_k32_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE), @@ -897,6 +905,7 @@ static u8 spectre_bhb_loop_affected(void }; static const struct midr_range spectre_bhb_k24_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A76), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A76AE), MIDR_ALL_VERSIONS(MIDR_CORTEX_A77), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD), @@ -912,7 +921,11 @@ static u8 spectre_bhb_loop_affected(void {}, }; - if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list)) + if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k132_list)) + k = 132; + else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k38_list)) + k = 38; + else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list)) k = 32; else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k24_list)) k = 24;