From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0EB4F218580; Mon, 23 Jun 2025 22:07:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750716476; cv=none; b=j16XudJ2Ze1TxS0kGhRwvnipzDnQcsu9ougupy+qVDPxhabS8CkAgZ+xvCPwaz5PjKYZKCYpgf60qWF11mQBJaNlrshnTmYEGDZUcbNeKoLBH0xwPU/iwAnhtvD6JjMkDWESYOnAodmieXFjcsdzf406Ls6wQTY9nxrQOzZuyoo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750716476; c=relaxed/simple; bh=JpwwKJ+ApB7a2RXg8sekNNvnNvJqaNm8bJC7PTLDreg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l4LPUIjW66clf9sh8cU1fd2sXWCSnr/KtXaOOjIfhyao/HvBX4tkQR3I1+okWuEons2u5ioqeqZaDllv1klcW6Bxxihub7VYui1WNIjGe65gCuLJb03ZQRLOl/j0fgNW65UCYabzkG+O5DU1FYyWoXt6WmmewtNQWzreqf11F/s= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=nzuaRvTR; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="nzuaRvTR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 990D7C4CEEA; Mon, 23 Jun 2025 22:07:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1750716475; bh=JpwwKJ+ApB7a2RXg8sekNNvnNvJqaNm8bJC7PTLDreg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nzuaRvTRrCoogTIF4t6cltCxwM7KB8Z3bMpyg6W7LlLhO6U74gmwWZR927PrnKdki yOQBF7qOmFLajza6qK7XwXpQmxJYR6VfktOJg8/YKc+E8SUtyL8keDNVwVHTBj934v MJ8F1EwZhdz3jYa/rSOR8lfAWP/EhyPLp0kBJHIY= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Mike Looijmans , Linus Walleij , Sasha Levin Subject: [PATCH 5.15 331/411] pinctrl: mcp23s08: Reset all pins to input at probe Date: Mon, 23 Jun 2025 15:07:55 +0200 Message-ID: <20250623130641.982831008@linuxfoundation.org> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250623130632.993849527@linuxfoundation.org> References: <20250623130632.993849527@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Mike Looijmans [ Upstream commit 3ede3f8b4b4b399b0ca41e44959f80d5cf84fc98 ] At startup, the driver just assumes that all registers have their default values. But after a soft reset, the chip will just be in the state it was, and some pins may have been configured as outputs. Any modification of the output register will cause these pins to be driven low, which leads to unexpected/unwanted effects. To prevent this from happening, set the chip's IO configuration register to a known safe mode (all inputs) before toggling any other bits. Signed-off-by: Mike Looijmans Link: https://lore.kernel.org/20250314151803.28903-1-mike.looijmans@topic.nl Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin --- drivers/pinctrl/pinctrl-mcp23s08.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c index 852354f6681b4..a743d9c6e1c77 100644 --- a/drivers/pinctrl/pinctrl-mcp23s08.c +++ b/drivers/pinctrl/pinctrl-mcp23s08.c @@ -567,6 +567,14 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, mcp->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); + /* + * Reset the chip - we don't really know what state it's in, so reset + * all pins to input first to prevent surprises. + */ + ret = mcp_write(mcp, MCP_IODIR, mcp->chip.ngpio == 16 ? 0xFFFF : 0xFF); + if (ret < 0) + return ret; + /* verify MCP_IOCON.SEQOP = 0, so sequential reads work, * and MCP_IOCON.HAEN = 1, so we work with all chips. */ -- 2.39.5