From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 883E24C6E; Mon, 23 Jun 2025 13:42:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750686157; cv=none; b=IxLjj6VX04JzhVd0j3vy2Ox1g6YtRwXVOifLupLuVkv7xbQ6XroCPvYvT1d5lz9GY0MnWFRpudV9nm9lyeBEWnoN/xNJlfuFPuVAKd005/Ck7GelrwJuAgBPWE/E99bcnVL6V2EjXJhAH0iToXH8uKRU726c2XaiyF/+5DzTuAU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750686157; c=relaxed/simple; bh=xEleVTwAV2hiYdEbcKw132KSxysNrZ1dDAT7s8ooWqw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cd7rMS3AyNv7q2WrodNGhRLM2UzEdfz9ocv7xYzFvxF+pUaCweWHI06i5BKFM28sLbvR6OqIWFeX0FBsB242Q0YGcFZn3PJG0AumH0IOCFCm5YylcnUHoMiE6OBqb24UHJ4nheLFVaJQ9VzlC2w3+gigVE0YxTyE+JrpnNTJEIg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=iFhulqL+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="iFhulqL+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1CA39C4CEF2; Mon, 23 Jun 2025 13:42:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1750686157; bh=xEleVTwAV2hiYdEbcKw132KSxysNrZ1dDAT7s8ooWqw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iFhulqL+Vbo+7uWIKYriftdADnqkJmTEV3pfV1Doc+DpzpaXrbsGqRs/uL9RQjN8T 9EuLepAoOjyODCUlTavU5kWm/cqksSNw/jEC/BfIgvtPez0UXhakQXJO5t3LbS+Bxe nbl2KaRFiBgXf7pb9mebrnvojXkcenG/fpKZ/PiE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Luca Weiss , Taniya Das , Bjorn Andersson , Sasha Levin Subject: [PATCH 6.1 073/508] clk: qcom: gcc-sm6350: Add *_wait_val values for GDSCs Date: Mon, 23 Jun 2025 15:01:58 +0200 Message-ID: <20250623130647.034276990@linuxfoundation.org> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250623130645.255320792@linuxfoundation.org> References: <20250623130645.255320792@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Luca Weiss [ Upstream commit afdfd829a99e467869e3ca1955fb6c6e337c340a ] Compared to the msm-4.19 driver the mainline GDSC driver always sets the bits for en_rest, en_few & clk_dis, and if those values are not set per-GDSC in the respective driver then the default value from the GDSC driver is used. The downstream driver only conditionally sets clk_dis_wait_val if qcom,clk-dis-wait-val is given in devicetree. Correct this situation by explicitly setting those values. For all GDSCs the reset value of those bits are used. Fixes: 131abae905df ("clk: qcom: Add SM6350 GCC driver") Signed-off-by: Luca Weiss Reviewed-by: Taniya Das Link: https://lore.kernel.org/r/20250425-sm6350-gdsc-val-v1-3-1f252d9c5e4e@fairphone.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- drivers/clk/qcom/gcc-sm6350.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/qcom/gcc-sm6350.c b/drivers/clk/qcom/gcc-sm6350.c index 428cd99dcdcbe..4031613c6236f 100644 --- a/drivers/clk/qcom/gcc-sm6350.c +++ b/drivers/clk/qcom/gcc-sm6350.c @@ -2320,6 +2320,9 @@ static struct clk_branch gcc_video_xo_clk = { static struct gdsc usb30_prim_gdsc = { .gdscr = 0x1a004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "usb30_prim_gdsc", }, @@ -2328,6 +2331,9 @@ static struct gdsc usb30_prim_gdsc = { static struct gdsc ufs_phy_gdsc = { .gdscr = 0x3a004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "ufs_phy_gdsc", }, -- 2.39.5