From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 363A01C5D46; Mon, 23 Jun 2025 21:33:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750714421; cv=none; b=S5FR2YpiSu88A35LoWFSYCYU+904GDjRVEPi4ew3Ws5L8hbFlHlytuKxm5Qit8Uw/zFSt1s2AFURdYGIPgM+8S1KQHsTLgZqSIna6m4XTl+2PNFy9LSXUvn8Lhya7ulyCRq970saKETB+tZXeHL6Dkcddqj/EZCvogk8vfQp+ZE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750714421; c=relaxed/simple; bh=Ty2j1eyY9KWFudmUB5/HXGucXcHxtonlnK4eWWlDteA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=I8Zmxyor1H9bUg8s1dxZU3JjXM4mXfQjZcEjjDFeK2wWPmo4ElvUjSiKD4EONiWrimn+GrQGIzLac6ghkxwQLh8rpHP10VVBUd9fJ2UY1EaNSBm+mL1tFce6oSkqB2Zw4lb++ojFdxcnUAHJSckLxb5mysAzfYcWuDtcXQDYyz4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=XX52LL/a; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="XX52LL/a" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C1D92C4CEEA; Mon, 23 Jun 2025 21:33:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1750714419; bh=Ty2j1eyY9KWFudmUB5/HXGucXcHxtonlnK4eWWlDteA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XX52LL/aX7HId3SS8S5RrHeQ9BeIQRRLURTSncrF2txbEV04Bt8ranVLIZNJ27Q7o yihy+TKtQlILe7uIYZm8d2gn4L3xMrKtBTx8jrn9NUyvuQyIjV9BD33VVPuBFoXEo+ XRNlqTLfp8kRzotm/sDlWop+iSA+TsKs0wLIJ5gQ= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Dan Carpenter , Simon Horman , Paolo Abeni , Sasha Levin Subject: [PATCH 6.1 171/508] net/mlx4_en: Prevent potential integer overflow calculating Hz Date: Mon, 23 Jun 2025 15:03:36 +0200 Message-ID: <20250623130649.482080619@linuxfoundation.org> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250623130645.255320792@linuxfoundation.org> References: <20250623130645.255320792@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Dan Carpenter [ Upstream commit 54d34165b4f786d7fea8412a18fb4a54c1eab623 ] The "freq" variable is in terms of MHz and "max_val_cycles" is in terms of Hz. The fact that "max_val_cycles" is a u64 suggests that support for high frequency is intended but the "freq_khz * 1000" would overflow the u32 type if we went above 4GHz. Use unsigned long long type for the mutliplication to prevent that. Fixes: 31c128b66e5b ("net/mlx4_en: Choose time-stamping shift value according to HW frequency") Signed-off-by: Dan Carpenter Reviewed-by: Simon Horman Link: https://patch.msgid.link/aDbFHe19juIJKjsb@stanley.mountain Signed-off-by: Paolo Abeni Signed-off-by: Sasha Levin --- drivers/net/ethernet/mellanox/mlx4/en_clock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c index 024788549c256..060698b0c65cc 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_clock.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c @@ -251,7 +251,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = { static u32 freq_to_shift(u16 freq) { u32 freq_khz = freq * 1000; - u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC; + u64 max_val_cycles = freq_khz * 1000ULL * MLX4_EN_WRAP_AROUND_SEC; u64 max_val_cycles_rounded = 1ULL << fls64(max_val_cycles - 1); /* calculate max possible multiplier in order to fit in 64bit */ u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded); -- 2.39.5