From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5794B254844; Mon, 23 Jun 2025 13:42:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750686147; cv=none; b=W89ufDs/ZPFktKfjuTC4k6W7iHpswDCiCOCkgDYyjBlek5v1k1fDlZhUt0JqCMeVwbrv5EkLNF1FmlJTW2BOoC+Y57xaa/1Y41T1N0udrTyNO56MlR/5j/eCZ4OvtFzopMm7MIlrWT4YEZLXz0YApR6BDpxkCeEJkwvDQc4ZFIE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750686147; c=relaxed/simple; bh=FiqfMiQYL1gmSsxFLHAY06GHpyjzwQkwYSjtcv07Yks=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ofAT62n7i1VQ5rtnCbrfJwpyBaKd+Du+ANrsVfgd3Tl12I88gVQSHjR8XMvPYmgEv3OHZKRB2mkMT8eyWNmh8bmjoxJWdTok8ksUYOeKGNqnx1Yrzf+Ika+WzKWyP/01k3XXMjzRMBBlPtu9OTgiC0gUgUSO6TfxdLVWTE1ykHM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=eBxQTqIj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="eBxQTqIj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E2477C4CEF0; Mon, 23 Jun 2025 13:42:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1750686147; bh=FiqfMiQYL1gmSsxFLHAY06GHpyjzwQkwYSjtcv07Yks=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eBxQTqIjCyYXd5+zW+zbVCd2WiebxPY9kjrOORx/UFf/0GbA0/Ijd1bkxPafYnQ9K sKB4Y5sF+ZqS9zzzhRu63CaVUbnYPismTMgvKIXy9COl4/6zi1Fp7beNj5iF5ciz35 qFw26pTAnNbQiML4ft5fS/KHzpCC014UtthUnjl4= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Andy Yan , Heiko Stuebner , Sasha Levin Subject: [PATCH 6.15 306/592] drm/rockchip: vop2: Make overlay layer select register configuration take effect by vsync Date: Mon, 23 Jun 2025 15:04:24 +0200 Message-ID: <20250623130707.681313552@linuxfoundation.org> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250623130700.210182694@linuxfoundation.org> References: <20250623130700.210182694@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Andy Yan [ Upstream commit c5996e4ab109c8bb5541453b20647eaaf9350f41 ] Because the layer/window enable/disable is take effect by vsync, if the overlay configuration of these layers does not follow vsync and takes effect immediately instead, when multiple layers are dynamically enable/disable, inconsistent display contents may be seen on the screen. Signed-off-by: Andy Yan Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250318062024.4555-1-andyshrk@163.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 1 + drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h index 680bedbb770e6..fc3ecb9fcd957 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h @@ -710,6 +710,7 @@ enum dst_factor_mode { #define VOP2_COLOR_KEY_MASK BIT(31) +#define RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL GENMASK(31, 30) #define RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD BIT(28) #define RK3568_OVL_CTRL__YUV_MODE(vp) BIT(vp) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c index 0a2840cbe8e22..32c4ed6857395 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -2070,7 +2070,10 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp) struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(vp->crtc.state); ovl_ctrl = vop2_readl(vop2, RK3568_OVL_CTRL); - ovl_ctrl |= RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD; + ovl_ctrl &= ~RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD; + ovl_ctrl &= ~RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL; + ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id); + if (vcstate->yuv_overlay) ovl_ctrl |= RK3568_OVL_CTRL__YUV_MODE(vp->id); else -- 2.39.5