From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DC4D2EE27E; Tue, 15 Jul 2025 13:54:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752587650; cv=none; b=Fx7K2BpASoZTW2bow9IGsYVbF171wdr5IwHRkTZOHPTzhoZbJ5lx371IDApYSzXhpw9IIng7brX4z1t8MSHke3K7VbC1px4w4gkPMK89NHS+rpNRqp2nELwZfgC+QMjmIq53/Qj10lAUVr7G0FVhSGSIjGzE788ievzQ6aLr71w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752587650; c=relaxed/simple; bh=QEMZHb1njrO6icsQy+/2ATwe8/lE2lB3uk/Xp3TIlM4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YRy1GvTK4ZKTmTEp8nXmus4bsCMaxvXmgWx7lRHPcern0y6I8dwy+sVitJnTVIGXH6oACRO6/A1kd7c9vJc95CWelEBS7Si6TgDtulKYNmhvmxlDwEd+pZVQY7c3/NcOm9WqOKb1McDlPdHLQihV/2ZLR3BWY+nOjWkTXuV+Z1I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=ZE+Uiujs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="ZE+Uiujs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9AC7EC4CEE3; Tue, 15 Jul 2025 13:54:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1752587650; bh=QEMZHb1njrO6icsQy+/2ATwe8/lE2lB3uk/Xp3TIlM4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZE+Uiujsj/WUoqP0HHOzh43vNF8HmRUy16OdXC10KIrAtWmClIn0/GKdAFd1LPEAf eTKBDnVH2R5tWy085A5zLTLyUaFtad3jgGo7xLFO19ujReH4x+0iDT+db9z3hdhcuo 2DsYgIrReUvi6ThjnIl1LlCdJW9VOU2Mabs94jbc= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Marek Szyprowski , Tomi Valkeinen , Inki Dae , Sasha Levin Subject: [PATCH 5.10 090/208] drm/exynos: fimd: Guard display clock control with runtime PM calls Date: Tue, 15 Jul 2025 15:13:19 +0200 Message-ID: <20250715130814.546063016@linuxfoundation.org> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250715130810.830580412@linuxfoundation.org> References: <20250715130810.830580412@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Marek Szyprowski [ Upstream commit 5d91394f236167ac624b823820faf4aa928b889e ] Commit c9b1150a68d9 ("drm/atomic-helper: Re-order bridge chain pre-enable and post-disable") changed the call sequence to the CRTC enable/disable and bridge pre_enable/post_disable methods, so those bridge methods are now called when CRTC is not yet enabled. This causes a lockup observed on Samsung Peach-Pit/Pi Chromebooks. The source of this lockup is a call to fimd_dp_clock_enable() function, when FIMD device is not yet runtime resumed. It worked before the mentioned commit only because the CRTC implemented by the FIMD driver was always enabled what guaranteed the FIMD device to be runtime resumed. This patch adds runtime PM guards to the fimd_dp_clock_enable() function to enable its proper operation also when the CRTC implemented by FIMD is not yet enabled. Fixes: 196e059a8a6a ("drm/exynos: convert clock_enable crtc callback to pipeline clock") Signed-off-by: Marek Szyprowski Reviewed-by: Tomi Valkeinen Signed-off-by: Inki Dae Signed-off-by: Sasha Levin --- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index c045330f9c48f..3b89a8774db5a 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -182,6 +182,7 @@ struct fimd_context { u32 i80ifcon; bool i80_if; bool suspended; + bool dp_clk_enabled; wait_queue_head_t wait_vsync_queue; atomic_t wait_vsync_event; atomic_t win_updated; @@ -1003,7 +1004,18 @@ static void fimd_dp_clock_enable(struct exynos_drm_clk *clk, bool enable) struct fimd_context *ctx = container_of(clk, struct fimd_context, dp_clk); u32 val = enable ? DP_MIE_CLK_DP_ENABLE : DP_MIE_CLK_DISABLE; + + if (enable == ctx->dp_clk_enabled) + return; + + if (enable) + pm_runtime_resume_and_get(ctx->dev); + + ctx->dp_clk_enabled = enable; writel(val, ctx->regs + DP_MIE_CLKCON); + + if (!enable) + pm_runtime_put(ctx->dev); } static const struct exynos_drm_crtc_ops fimd_crtc_ops = { -- 2.39.5